diff options
| author | Peter Lemenkov <lemenkov@gmail.com> | 2019-06-15 21:39:32 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-07-18 13:48:43 +0000 |
| commit | 6752b61514609efd55e7d248b7c3c7127ee43693 (patch) | |
| tree | 7ceaae627f48f4fdc679ff64694d5165f97fc810 /src/mainboard/lenovo/t520 | |
| parent | 915327136858d5412c9c02bf0730578e87101d59 (diff) | |
| download | coreboot-6752b61514609efd55e7d248b7c3c7127ee43693.tar.xz | |
mb/*/*/gpio: Use static for const structures
Autoport generates these structures as static so let's make it consistent.
See also commit 128205fd with Change-Id
I83382d38a4a3b7ed11b8e7077cc5fbe154e261a7 ("autoport/bd82x6x.go: Improve
gpio.c generation").
Change-Id: I4e07bd755ca4a65b76c69625d235a879fe7b43cb
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33524
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo/t520')
| -rw-r--r-- | src/mainboard/lenovo/t520/variants/t520/gpio.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/src/mainboard/lenovo/t520/variants/t520/gpio.c b/src/mainboard/lenovo/t520/variants/t520/gpio.c index 3a10bd0083..a4351bb5ba 100644 --- a/src/mainboard/lenovo/t520/variants/t520/gpio.c +++ b/src/mainboard/lenovo/t520/variants/t520/gpio.c @@ -15,7 +15,7 @@ #include <southbridge/intel/common/gpio.h> -const struct pch_gpio_set1 pch_gpio_set1_mode = { +static const struct pch_gpio_set1 pch_gpio_set1_mode = { .gpio0 = GPIO_MODE_GPIO, // -USB30_SMI - input .gpio1 = GPIO_MODE_GPIO, // -EC_SCI - input .gpio2 = GPIO_MODE_GPIO, // -LCD_PRESENCE - input @@ -50,7 +50,7 @@ const struct pch_gpio_set1 pch_gpio_set1_mode = { .gpio31 = GPIO_MODE_NATIVE, // ACPRESENT - input }; -const struct pch_gpio_set1 pch_gpio_set1_direction = { +static const struct pch_gpio_set1 pch_gpio_set1_direction = { .gpio0 = GPIO_DIR_INPUT, .gpio1 = GPIO_DIR_INPUT, .gpio2 = GPIO_DIR_INPUT, @@ -85,7 +85,7 @@ const struct pch_gpio_set1 pch_gpio_set1_direction = { .gpio31 = GPIO_DIR_INPUT }; -const struct pch_gpio_set1 pch_gpio_set1_level = { +static const struct pch_gpio_set1 pch_gpio_set1_level = { .gpio0 = GPIO_LEVEL_HIGH, .gpio1 = GPIO_LEVEL_HIGH, .gpio2 = GPIO_LEVEL_LOW, @@ -120,17 +120,17 @@ const struct pch_gpio_set1 pch_gpio_set1_level = { .gpio31 = GPIO_LEVEL_LOW, }; -const struct pch_gpio_set1 pch_gpio_set1_invert = { +static const struct pch_gpio_set1 pch_gpio_set1_invert = { .gpio1 = GPIO_INVERT, .gpio7 = GPIO_INVERT, .gpio13 = GPIO_INVERT, }; -const struct pch_gpio_set1 pch_gpio_set1_blink = { +static const struct pch_gpio_set1 pch_gpio_set1_blink = { .gpio18 = GPIO_NO_BLINK, }; -const struct pch_gpio_set2 pch_gpio_set2_mode = { +static const struct pch_gpio_set2 pch_gpio_set2_mode = { .gpio32 = GPIO_MODE_NATIVE, // CLKRUN - output .gpio33 = GPIO_MODE_GPIO, // SATA_DOCK_DTCT - output to SATA4GP .gpio34 = GPIO_MODE_GPIO, // VRAM_SIZE_ID - input - HIGH: 1GB / LOW: 2GB @@ -165,7 +165,7 @@ const struct pch_gpio_set2 pch_gpio_set2_mode = { .gpio63 = GPIO_MODE_NATIVE, // SLP_S5 - output }; -const struct pch_gpio_set2 pch_gpio_set2_direction = { +static const struct pch_gpio_set2 pch_gpio_set2_direction = { .gpio32 = GPIO_DIR_INPUT, .gpio33 = GPIO_DIR_OUTPUT, .gpio34 = GPIO_DIR_INPUT, @@ -200,7 +200,7 @@ const struct pch_gpio_set2 pch_gpio_set2_direction = { .gpio63 = GPIO_DIR_OUTPUT, }; -const struct pch_gpio_set2 pch_gpio_set2_level = { +static const struct pch_gpio_set2 pch_gpio_set2_level = { .gpio32 = GPIO_LEVEL_HIGH, .gpio33 = GPIO_LEVEL_HIGH, .gpio34 = GPIO_LEVEL_HIGH, @@ -235,7 +235,7 @@ const struct pch_gpio_set2 pch_gpio_set2_level = { .gpio63 = GPIO_LEVEL_HIGH, }; -const struct pch_gpio_set3 pch_gpio_set3_mode = { +static const struct pch_gpio_set3 pch_gpio_set3_mode = { .gpio64 = GPIO_MODE_NATIVE, // NC .gpio65 = GPIO_MODE_NATIVE, // NC .gpio66 = GPIO_MODE_NATIVE, // NC @@ -250,7 +250,7 @@ const struct pch_gpio_set3 pch_gpio_set3_mode = { .gpio75 = GPIO_MODE_NATIVE, // SML1DATA - EC_SDA2 - i/o }; -const struct pch_gpio_set3 pch_gpio_set3_direction = { +static const struct pch_gpio_set3 pch_gpio_set3_direction = { .gpio64 = GPIO_DIR_OUTPUT, .gpio65 = GPIO_DIR_OUTPUT, .gpio66 = GPIO_DIR_OUTPUT, @@ -265,7 +265,7 @@ const struct pch_gpio_set3 pch_gpio_set3_direction = { .gpio75 = GPIO_DIR_INPUT, }; -const struct pch_gpio_set3 pch_gpio_set3_level = { +static const struct pch_gpio_set3 pch_gpio_set3_level = { .gpio64 = GPIO_LEVEL_HIGH, .gpio65 = GPIO_LEVEL_HIGH, .gpio66 = GPIO_LEVEL_HIGH, |