diff options
| author | Sven Schnelle <svens@stackframe.org> | 2011-10-15 17:31:01 +0200 |
|---|---|---|
| committer | Sven Schnelle <svens@stackframe.org> | 2011-10-20 16:06:35 +0200 |
| commit | b5381105325391553b17c6ec2455233fc27e73b8 (patch) | |
| tree | 244f77d68819d0cd504ac3ac2ec47d56fb78c349 /src/mainboard/lenovo/t60/dock.c | |
| parent | 2588db496d8037c9e548a9dd75360a3785b0ae7f (diff) | |
| download | coreboot-b5381105325391553b17c6ec2455233fc27e73b8.tar.xz | |
T60: Add support for Ultrabay Legacy I/O devices (40Y8122)
Those modules have basically the same Super I/O capabilities as
the Docking station. Unfortunately, the Super I/O in the module
shares the same I/O address as the Docking station, so we're not
allowed to connect the LPC Docking Bus if such a module is present.
To be able to detect this device and use it as early console for
coreboot, we have to initialize the GPIO Controller before, as
this device is detected via GPIO06.
Change-Id: If7c38bb6797f76cf28f09f3614ab9a33878571fb
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/282
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/lenovo/t60/dock.c')
| -rw-r--r-- | src/mainboard/lenovo/t60/dock.c | 37 |
1 files changed, 27 insertions, 10 deletions
diff --git a/src/mainboard/lenovo/t60/dock.c b/src/mainboard/lenovo/t60/dock.c index 6642bb3759..5cd8997355 100644 --- a/src/mainboard/lenovo/t60/dock.c +++ b/src/mainboard/lenovo/t60/dock.c @@ -28,8 +28,11 @@ #include "dock.h" #include "superio/nsc/pc87384/pc87384.h" #include "ec/acpi/ec.h" +#include "ec/lenovo/pmh7/pmh7.h" #include "southbridge/intel/i82801gx/i82801gx.h" +#define DLPC_CONTROL 0x164c + static void dlpc_write_register(int reg, int value) { outb(reg, 0x164e); @@ -102,12 +105,15 @@ int dlpc_init(void) /* Select DLPC module */ dlpc_write_register(0x07, 0x19); - /* DLPC Base Address 0x164c */ - dlpc_write_register(0x60, 0x16); - dlpc_write_register(0x61, 0x4c); + /* DLPC Base Address */ + dlpc_write_register(0x60, (DLPC_CONTROL >> 8) & 0xff); + dlpc_write_register(0x61, DLPC_CONTROL & 0xff); /* Activate DLPC */ dlpc_write_register(0x30, 0x01); + /* Reset docking state */ + outb(0x00, DLPC_CONTROL); + dlpc_gpio_init(); return 0; } @@ -127,7 +133,7 @@ static int dock_superio_init(void) /* set GPIO pins to Serial/Parallel Port * functions */ - dock_write_register(0x22, 0xeb); + dock_write_register(0x22, 0xa9); dock_write_register(0x07, PC87384_GPIO); dock_write_register(0x60, 0x16); @@ -179,16 +185,16 @@ int dock_connect(void) { int timeout = 1000; - outb(0x07, 0x164c); + outb(0x07, DLPC_CONTROL); timeout = 1000; - while(!(inb(0x164c) & 8) && timeout--) + while(!(inb(DLPC_CONTROL) & 8) && timeout--) udelay(1000); if (!timeout) { /* docking failed, disable DLPC switch */ - outb(0x00, 0x164c); + outb(0x00, DLPC_CONTROL); dlpc_write_register(0x30, 0x00); return 1; } @@ -206,14 +212,25 @@ int dock_connect(void) void dock_disconnect(void) { /* disconnect LPC bus */ - outb(0x00, 0x164c); + outb(0x00, DLPC_CONTROL); /* Assert PLTRST and DLPCPD */ outb(0xfc, 0x1680); } int dock_present(void) { - outb(0x61, 0x15ec); - return inb(0x15ee) & 1; + return pmh7_register_read(0x61) & 1; +} + +int legacy_io_present(void) +{ + return !(inb(DEFAULT_GPIOBASE + 0x0c) & 0x40); } +void legacy_io_init(void) +{ + /* Enable Power for Ultrabay slot */ + pmh7_ultrabay_power_enable(1); + udelay(100000); + dock_superio_init(); +} |