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author | Patrick Rudolph <siro@das-labor.org> | 2017-08-08 13:13:51 +0200 |
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committer | Martin Roth <martinroth@google.com> | 2017-08-10 16:09:01 +0000 |
commit | b794a69ce9b2cbb9d6565cf0f3ac609402ad680a (patch) | |
tree | f200de26860f1d7f1465bb604f29e08b29f6cbc1 /src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb | |
parent | db27e3384a596aad4e33abf535a72d42f7aab1e8 (diff) | |
download | coreboot-b794a69ce9b2cbb9d6565cf0f3ac609402ad680a.tar.xz |
nb/intel/sandybridge/raminit: Add Kconfig option for fuses
Add a new Kconfig option to ignore memory fuses that limit the
maximum DRAM frequency to be used. The option is disabled by
default and should only enabled by experienced users as it
might decrease system stability or prevent a successful RAM
training.
Remove conflicting devicetree settings.
Change-Id: I35dd78a02bcaafce8ba522d253c795d7835bacae
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/20907
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nicola Corna <nicola@corna.info>
Diffstat (limited to 'src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb')
-rw-r--r-- | src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb b/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb index ce74d3fef6..e76f68ae60 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb +++ b/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb @@ -15,9 +15,6 @@ chip northbridge/intel/sandybridge register "gpu_panel_power_up_delay" = "300" register "gpu_pch_backlight" = "0x11551155" - # Override fuse bits that hard-code the value to 666 Mhz - register "max_mem_clock_mhz" = "933" - device cpu_cluster 0 on chip cpu/intel/socket_rPGA989 device lapic 0 on end |