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authorVladimir Serbinenko <phcoder@gmail.com>2014-10-19 10:13:14 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2014-11-23 17:30:13 +0100
commit33b535f15ded011c92cd1757408a3453a55b44bd (patch)
tree67ae10671273ccb152d5462290afcd4aba2579d9 /src/mainboard/lenovo/x201
parent5903a78e1e5aa28dc18e626df416b4076398763d (diff)
downloadcoreboot-33b535f15ded011c92cd1757408a3453a55b44bd.tar.xz
sandy/ivy/nehalem: Remerge interrupt handling
On those chipsets the pins are just a legacy concept. Real interrupts are messages on corresponding busses or some internal logic of chipset. Hence interrupt routing isn't anymore board-specific (dependent on layout) but depends only on configuration. Rather than attempting to sync real config, ACPI and legacy descriptors, just use the same interrupt routing per chipset covering all possible devices. The only part which remains board-specific are LPC and PCI interrupts. Interrupt balancing may suffer from such merge but: a) Doesn't seem to be the case of this map on current systems b) Almost all OS use MSI nowadays bypassing this stuff completely c) If we want a good balancing we need to take into account that e.g. wlan card may be placed in a different slot and so would require complicated balancing on runtime. It's difficult to maintain with almost no benefit. Change-Id: I9f63d1d338c5587ebac7a52093e5b924f6e5ca2d Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7130 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/lenovo/x201')
-rw-r--r--src/mainboard/lenovo/x201/acpi/nehalem_pci_irqs.asl86
-rw-r--r--src/mainboard/lenovo/x201/acpi_tables.c36
-rw-r--r--src/mainboard/lenovo/x201/devicetree.cb9
-rw-r--r--src/mainboard/lenovo/x201/romstage.c40
4 files changed, 4 insertions, 167 deletions
diff --git a/src/mainboard/lenovo/x201/acpi/nehalem_pci_irqs.asl b/src/mainboard/lenovo/x201/acpi/nehalem_pci_irqs.asl
deleted file mode 100644
index 3e9e1b3ca7..0000000000
--- a/src/mainboard/lenovo/x201/acpi/nehalem_pci_irqs.asl
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Vladimir Serbinenko
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-/* This is board specific information: IRQ routing.
- */
-
-
-// PCI Interrupt Routing
-Method(_PRT)
-{
- If (PICM) {
- Return (Package() {
- Package() { 0x0001ffff, 0, 0, 0x10 },
- Package() { 0x0002ffff, 0, 0, 0x10 }, // VGA
- Package() { 0x0003ffff, 0, 0, 0x10 },
- Package() { 0x0016ffff, 0, 0, 0x10 }, // ME
- Package() { 0x0016ffff, 1, 0, 0x11 }, // ME
- Package() { 0x0016ffff, 2, 0, 0x12 }, // ME
- Package() { 0x0016ffff, 3, 0, 0x13 }, // ME
- Package() { 0x0019ffff, 0, 0, 0x14 }, // Ethernet
- Package() { 0x001affff, 0, 0, 0x14 }, // USB
- Package() { 0x001affff, 1, 0, 0x15 }, // USB
- Package() { 0x001affff, 2, 0, 0x16 }, // USB
- Package() { 0x001affff, 3, 0, 0x17 }, // USB
- Package() { 0x001bffff, 1, 0, 0x11 }, // Audio
- Package() { 0x001cffff, 0, 0, 0x14 }, // PCI bridge
- Package() { 0x001cffff, 1, 0, 0x15 }, // PCI bridge
- Package() { 0x001cffff, 2, 0, 0x16 }, // PCI bridge
- Package() { 0x001cffff, 3, 0, 0x17 }, // PCI bridge
- Package() { 0x001dffff, 0, 0, 0x10 }, // USB
- Package() { 0x001dffff, 1, 0, 0x11 }, // USB
- Package() { 0x001dffff, 2, 0, 0x12 }, // USB
- Package() { 0x001dffff, 3, 0, 0x13 }, // USB
- Package() { 0x001fffff, 0, 0, 0x17 }, // LPC
- Package() { 0x001fffff, 1, 0, 0x10 }, // IDE
- Package() { 0x001fffff, 2, 0, 0x11 }, // SATA
- Package() { 0x001fffff, 3, 0, 0x13 } // SMBUS
- })
- } Else {
- Return (Package() {
- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, // VGA
- Package() { 0x0003ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
- Package() { 0x0016ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, // ME
- Package() { 0x0016ffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, // ME
- Package() { 0x0016ffff, 2, \_SB.PCI0.LPCB.LNKC, 0 }, // ME
- Package() { 0x0016ffff, 3, \_SB.PCI0.LPCB.LNKD, 0 }, // ME
- Package() { 0x0019ffff, 0, \_SB.PCI0.LPCB.LNKE, 0 }, // Ethernet
- Package() { 0x001affff, 0, \_SB.PCI0.LPCB.LNKE, 0 }, // USB
- Package() { 0x001affff, 1, \_SB.PCI0.LPCB.LNKF, 0 }, // USB
- Package() { 0x001affff, 2, \_SB.PCI0.LPCB.LNKG, 0 }, // USB
- Package() { 0x001affff, 3, \_SB.PCI0.LPCB.LNKH, 0 }, // USB
- Package() { 0x001bffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, // Audio
- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKE, 0 }, // PCI
- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKF, 0 }, // PCI
- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKG, 0 }, // PCI
- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKH, 0 }, // PCI
- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, // USB
- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, // USB
- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 }, // USB
- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKD, 0 }, // USB
- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKH, 0 }, // LPC
- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKA, 0 }, // IDE
- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKB, 0 }, // SATA
- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKD, 0 } // SMBus
- })
- }
-}
diff --git a/src/mainboard/lenovo/x201/acpi_tables.c b/src/mainboard/lenovo/x201/acpi_tables.c
index b8979f495a..85eabc7d1f 100644
--- a/src/mainboard/lenovo/x201/acpi_tables.c
+++ b/src/mainboard/lenovo/x201/acpi_tables.c
@@ -48,42 +48,6 @@ void acpi_create_gnvs(global_nvs_t * gnvs)
gnvs->did[4] = 0x00000005;
}
-unsigned long acpi_fill_madt(unsigned long current)
-{
- /* Local APICs */
- current = acpi_create_madt_lapics(current);
-
- /* IOAPIC */
- current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
- 1, IO_APIC_ADDR, 0);
-
- /* INT_SRC_OVR */
- current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
- current, 0, 0, 2,
- MP_IRQ_POLARITY_DEFAULT |
- MP_IRQ_TRIGGER_DEFAULT);
- current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
- current, 0, 9, 9,
- MP_IRQ_POLARITY_HIGH |
- MP_IRQ_TRIGGER_LEVEL);
-
- /* LAPIC_NMI */
- current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)
- current, 0,
- MP_IRQ_POLARITY_HIGH |
- MP_IRQ_TRIGGER_EDGE, 0x01);
- current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)
- current, 1, MP_IRQ_POLARITY_HIGH |
- MP_IRQ_TRIGGER_EDGE, 0x01);
- current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)
- current, 2, MP_IRQ_POLARITY_HIGH |
- MP_IRQ_TRIGGER_EDGE, 0x01);
- current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)
- current, 3, MP_IRQ_POLARITY_HIGH |
- MP_IRQ_TRIGGER_EDGE, 0x01);
- return current;
-}
-
unsigned long acpi_fill_slit(unsigned long current)
{
/* Not implemented */
diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb
index 614245cba9..117c25c891 100644
--- a/src/mainboard/lenovo/x201/devicetree.cb
+++ b/src/mainboard/lenovo/x201/devicetree.cb
@@ -93,15 +93,6 @@ chip northbridge/intel/nehalem
subsystemid 0x17aa 0x215a
end
chip southbridge/intel/ibexpeak
- register "pirqa_routing" = "0x0b"
- register "pirqb_routing" = "0x0b"
- register "pirqc_routing" = "0x0b"
- register "pirqd_routing" = "0x0b"
- register "pirqe_routing" = "0x0b"
- register "pirqf_routing" = "0x0b"
- register "pirqg_routing" = "0x0b"
- register "pirqh_routing" = "0x0b"
-
# GPI routing
# 0 No effect (default)
# 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c
index 2c3dfd1bcc..e58f5f6d5e 100644
--- a/src/mainboard/lenovo/x201/romstage.c
+++ b/src/mainboard/lenovo/x201/romstage.c
@@ -75,41 +75,9 @@ static void pch_enable_lpc(void)
static void rcba_config(void)
{
+ southbridge_configure_default_intmap();
+
static const u32 rcba_dump3[] = {
- /* 30fc */ 0x00000000,
- /* 3100 */ 0x04341200, 0x00000000, 0x40043214, 0x00014321,
- /* 3110 */ 0x00000002, 0x30003214, 0x00000001, 0x00000002,
- /* 3120 */ 0x00000000, 0x00002321, 0x00000000, 0x00000000,
- /* 3130 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 3140 */ 0x00003107, 0x76543210, 0x00000010, 0x00007654,
- /* 3150 */ 0x00000004, 0x00000000, 0x00000000, 0x00003210,
- /* 3160 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 3170 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 3180 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 3190 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 31a0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 31b0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 31c0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 31d0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 31e0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 31f0 */ 0x00000000, 0x00000000, 0x00000000, 0x03000000,
- /* 3200 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 3210 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 3220 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 3230 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 3240 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 3250 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 3260 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 3270 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 3280 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 3290 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 32a0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 32b0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 32c0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 32d0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 32e0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 32f0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- /* 3300 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
/* 3310 */ 0x02060100, 0x0000000f, 0x01020000, 0x80000000,
/* 3320 */ 0x00000000, 0x04000000, 0x00000000, 0x00000000,
/* 3330 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -179,8 +147,8 @@ static void rcba_config(void)
};
unsigned i;
for (i = 0; i < sizeof(rcba_dump3) / 4; i++) {
- RCBA32(4 * i + 0x30fc) = rcba_dump3[i];
- (void)RCBA32(4 * i + 0x30fc);
+ RCBA32(4 * i + 0x3310) = rcba_dump3[i];
+ (void)RCBA32(4 * i + 0x3310);
}
}