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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-12-29 11:32:27 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-04-28 07:58:50 +0200 |
| commit | 189f3ba974df8f1b305cfa421a151fe069fc1a6f (patch) | |
| tree | c6c82c0b47681294bb74a6a844a2f3234d8c86fb /src/mainboard/lenovo/x201 | |
| parent | 05a8472900ab2a57218b5f3affdaad1df10ed44e (diff) | |
| download | coreboot-189f3ba974df8f1b305cfa421a151fe069fc1a6f.tar.xz | |
x60,t60,x201,macbook21 : Declare GPIs for EC
For lenovo/x201, this also changes GPI_ROUT (0xb8-0xbb)
programming to use GPI1 between SCI/SMI modes, while
previous programming was for GPI12.
Change-Id: I3ac0feaa1d10c8f0e53a5fa5af72366503bb5d2d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-on: http://review.coreboot.org/8656
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/lenovo/x201')
| -rw-r--r-- | src/mainboard/lenovo/x201/smihandler.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/src/mainboard/lenovo/x201/smihandler.c b/src/mainboard/lenovo/x201/smihandler.c index d8e78072fd..7b14191683 100644 --- a/src/mainboard/lenovo/x201/smihandler.c +++ b/src/mainboard/lenovo/x201/smihandler.c @@ -34,6 +34,9 @@ #include "dock.h" #include "smi.h" +#define GPE_EC_SCI 1 +#define GPE_EC_WAKE 13 + /* The southbridge SMI handler checks whether gnvs has a * valid pointer before calling the trap handler */ @@ -137,7 +140,7 @@ static void mainboard_smi_handle_ec_sci(void) void mainboard_smi_gpi(u32 gpi_sts) { - if (gpi_sts & (1 << 1)) + if (gpi_sts & (1 << GPE_EC_SCI)) mainboard_smi_handle_ec_sci(); } @@ -173,7 +176,7 @@ int mainboard_smi_apmc(u8 data) /* use 0x1600/0x1604 to prevent races with userspace */ ec_set_ports(0x1604, 0x1600); /* route H8SCI to SCI */ - outw(inw(pmbase + ALT_GP_SMI_EN) & ~0x1000, pmbase + ALT_GP_SMI_EN); + outw(inw(pmbase + ALT_GP_SMI_EN) & ~(1<<GPE_EC_SCI), pmbase + ALT_GP_SMI_EN); tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb); tmp &= ~0x03; tmp |= 0x02; @@ -186,7 +189,7 @@ int mainboard_smi_apmc(u8 data) provide a EC query function */ ec_set_ports(0x66, 0x62); /* route H8SCI# to SMI */ - outw(inw(pmbase + ALT_GP_SMI_EN) | 0x1000, + outw(inw(pmbase + ALT_GP_SMI_EN) | (1<<GPE_EC_SCI), pmbase + ALT_GP_SMI_EN); tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb); tmp &= ~0x03; @@ -211,11 +214,11 @@ void mainboard_smi_sleep(u8 slp_typ) u16 pmbase = pci_read_config16(PCI_DEV(0, 0x1f, 0), 0x40) & 0xfffc; /* Enable EC WAKE GPE. */ - outl(inl(pmbase + GPE0_EN) | (1 << 29), pmbase + GPE0_EN); + outl(inl(pmbase + GPE0_EN) | (1 << (16 + GPE_EC_WAKE)), pmbase + GPE0_EN); gpe_rout = pci_read_config32(PCI_DEV(0, 0x1f, 0), GPIO_ROUT); /* Redirect EC WAKE GPE to SCI. */ - gpe_rout &= ~(3 << 26); - gpe_rout |= (2 << 26); + gpe_rout &= ~(3 << (2 * GPE_EC_WAKE)); + gpe_rout |= (2 << (2 * GPE_EC_WAKE)); pci_write_config32(PCI_DEV(0, 0x1f, 0), GPIO_ROUT, gpe_rout); } } |