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author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-08-30 00:35:39 +0200 |
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committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-09-13 14:27:03 +0200 |
commit | a71bdc318195b864c427cddc60e69a6145a8ab28 (patch) | |
tree | d81255e7c3338cb9a28d71b5713e61126c77ec9e /src/mainboard/lenovo/x201 | |
parent | 85620db107d587a8341987162d403f4b7aee9a81 (diff) | |
download | coreboot-a71bdc318195b864c427cddc60e69a6145a8ab28.tar.xz |
intel/gma: consolidate vbt code
Change-Id: I80b7facfb9cc9f642dd1c766884dc23da1aab2c8
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6800
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/mainboard/lenovo/x201')
-rw-r--r-- | src/mainboard/lenovo/x201/devicetree.cb | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb index 21e328a84c..7592cb06bd 100644 --- a/src/mainboard/lenovo/x201/devicetree.cb +++ b/src/mainboard/lenovo/x201/devicetree.cb @@ -35,10 +35,10 @@ chip northbridge/intel/nehalem register "gpu_panel_power_backlight_off_delay" = "2500" register "gpu_cpu_backlight" = "0x58d" register "gpu_pch_backlight" = "0x061a061a" - register "gpu_use_spread_spectrum_clock" = "1" - register "gpu_lvds_dual_channel" = "0" - register "gpu_link_frequency_270_mhz" = "1" - register "gpu_lvds_num_lanes" = "4" + register "gfx.use_spread_spectrum_clock" = "1" + register "gfx.lvds_dual_channel" = "0" + register "gfx.link_frequency_270_mhz" = "1" + register "gfx.lvds_num_lanes" = "4" chip ec/lenovo/pmh7 device pnp ff.1 on # dummy |