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authorVladimir Serbinenko <phcoder@gmail.com>2015-05-27 21:07:09 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2015-05-28 11:19:21 +0200
commit5477dca22323c7067455a22d6d0a8d06c40c4191 (patch)
tree5269812dc717df2ebba18fab9f17f9461ec6432e /src/mainboard/lenovo/x220
parent6f163a64c93356ba116be932d1c16eba3d40285e (diff)
downloadcoreboot-5477dca22323c7067455a22d6d0a8d06c40c4191.tar.xz
intel: Remove pstate_coord_type.
Not used anywhere. Change-Id: I9bab092d285aaebdf9283ba08e23197f9785b3a6 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/10329 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Diffstat (limited to 'src/mainboard/lenovo/x220')
-rw-r--r--src/mainboard/lenovo/x220/devicetree.cb3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb
index 28e240a07c..e9a417844c 100644
--- a/src/mainboard/lenovo/x220/devicetree.cb
+++ b/src/mainboard/lenovo/x220/devicetree.cb
@@ -28,9 +28,6 @@ chip northbridge/intel/sandybridge
# Magic APIC ID to locate this chip
device lapic 0xACAC off end
- # Coordinate with HW_ALL
- register "pstate_coord_type" = "0xfe"
-
register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1)
register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7)