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authorVladimir Serbinenko <phcoder@gmail.com>2014-09-06 01:38:55 +0300
committerVladimir Serbinenko <phcoder@gmail.com>2014-10-16 15:34:29 +0200
commit0253ee0ce4d92ef076c78f710443cb9dfac459e9 (patch)
treed1505b14e6b1e047ad68108ab207d547c19eb528 /src/mainboard/lenovo/x220
parent332f14b60b241d1793401ea50b22785ad81c97cd (diff)
downloadcoreboot-0253ee0ce4d92ef076c78f710443cb9dfac459e9.tar.xz
x220, x230: Remove unused headers.
Change-Id: Ia85e3b588c0e255e5c0f77114f051130596ce8d5 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6922 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/lenovo/x220')
-rw-r--r--src/mainboard/lenovo/x220/mainboard.c7
-rw-r--r--src/mainboard/lenovo/x220/romstage.c3
2 files changed, 0 insertions, 10 deletions
diff --git a/src/mainboard/lenovo/x220/mainboard.c b/src/mainboard/lenovo/x220/mainboard.c
index 87fedfe30a..00e7991250 100644
--- a/src/mainboard/lenovo/x220/mainboard.c
+++ b/src/mainboard/lenovo/x220/mainboard.c
@@ -26,15 +26,10 @@
#include <device/pci_ops.h>
#include <console/console.h>
#include <drivers/intel/gma/int15.h>
-#include <pc80/mc146818rtc.h>
#include <arch/acpi.h>
-#include <arch/io.h>
-#include <arch/interrupt.h>
-#include <boot/coreboot_tables.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <smbios.h>
#include <device/pci.h>
-#include <cbfs.h>
#include <pc80/keyboard.h>
#include <ec/lenovo/h8/h8.h>
#include <build.h>
@@ -54,8 +49,6 @@ const char *smbios_mainboard_bios_version(void)
return "CBET4000 " COREBOOT_VERSION;
}
-
-
static void mainboard_init(device_t dev)
{
RCBA32(0x38c8) = 0x00002005;
diff --git a/src/mainboard/lenovo/x220/romstage.c b/src/mainboard/lenovo/x220/romstage.c
index b989ecb686..5ea91cf4a9 100644
--- a/src/mainboard/lenovo/x220/romstage.c
+++ b/src/mainboard/lenovo/x220/romstage.c
@@ -28,9 +28,7 @@
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
#include <arch/acpi.h>
-#include <cbmem.h>
#include <console/console.h>
#include "northbridge/intel/sandybridge/sandybridge.h"
#include "northbridge/intel/sandybridge/raminit_native.h"
@@ -39,7 +37,6 @@
#include <arch/cpu.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
-#include <cbfs.h>
static void pch_enable_lpc(void)
{