summaryrefslogtreecommitdiff
path: root/src/mainboard/lenovo/x230/variants/x230/overridetree.cb
diff options
context:
space:
mode:
authorBill XIE <persmule@hardenedlinux.org>2020-05-08 16:40:48 +0800
committerPatrick Georgi <pgeorgi@google.com>2020-05-13 12:10:38 +0000
commit6b95507ec5b087658178a325bdc68570bc48bb20 (patch)
treed90061b5a4b4887bb3b50239702a4d1acc743b27 /src/mainboard/lenovo/x230/variants/x230/overridetree.cb
parent741099239194b01ef153a7b41a9d8389b0b06f8e (diff)
downloadcoreboot-6b95507ec5b087658178a325bdc68570bc48bb20.tar.xz
mainboard/lenovo/x230: Add ThinkPad x230s as a variant
The code is based on autoport and that for X230. Major differences are: - Only one DDR3 slot - HM77 PCH - M.2 socket instead of mini pci-e - no docking - no tpm Tested: - CPU i5-3337U - Slotted DIMM 8GiB - Camera - pci-e and usb2 on M.2 slot with A key for wlan - sata and usb2 (no superspeed components) on M.2 slot with B key for wwan - On board SDHCI connected to pci-e - USB3 ports - libgfxinit-based graphic init - NVRAM options for North and South bridges - Sound - Thinkpad EC - S3 - Linux 4.9 within Debian GNU/Linux stable, loaded from Seabios. Untested: - Touch screen, which is said to work under ubuntu but not debian. Change-Id: Ie537645d5ffaee799e79af2f821f80c3ebd2dfec Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41168 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/lenovo/x230/variants/x230/overridetree.cb')
-rw-r--r--src/mainboard/lenovo/x230/variants/x230/overridetree.cb15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/x230/variants/x230/overridetree.cb b/src/mainboard/lenovo/x230/variants/x230/overridetree.cb
new file mode 100644
index 0000000000..8f1a97d9dd
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230/overridetree.cb
@@ -0,0 +1,15 @@
+chip northbridge/intel/sandybridge
+ device domain 0x0 on
+ chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
+ register "docking_supported" = "1"
+ device pci 1c.2 on
+ smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
+ end # PCIe Port #3 (expresscard)
+ device pci 1f.0 on # LPC bridge
+ chip ec/lenovo/h8
+ register "eventa_enable" = "0x01"
+ end
+ end # LPC Controller
+ end
+ end
+end