mainboard/lenovo/x230: Add ThinkPad x230s as a variant

The code is based on autoport and that for X230. Major differences are:
    - Only one DDR3 slot
    - HM77 PCH
    - M.2 socket instead of mini pci-e
    - no docking
    - no tpm

Tested:
    - CPU i5-3337U
    - Slotted DIMM 8GiB
    - Camera
    - pci-e and usb2 on M.2 slot with A key for wlan
    - sata and usb2  (no superspeed components) on M.2 slot with B key for wwan
    - On board SDHCI connected to pci-e
    - USB3 ports
    - libgfxinit-based graphic init
    - NVRAM options for North and South bridges
    - Sound
    - Thinkpad EC
    - S3
    - Linux 4.9 within Debian GNU/Linux stable, loaded from
      Seabios.

Untested:
    - Touch screen, which is said to work under ubuntu but not debian.

Change-Id: Ie537645d5ffaee799e79af2f821f80c3ebd2dfec
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41168
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

1 files changed, 49 insertions, 0 deletions

diff --git a/src/mainboard/lenovo/x230/variants/x230s/early_init.c b/src/mainboard/lenovo/x230/variants/x230s/early_init.c
new file mode 100644
index 0000000000..0b4c084f77
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230s/early_init.c
@@ -0,0 +1,49 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/* FIXME: Check if all includes are needed. */
+
+#include <stdint.h>
+#include <string.h>
+#include <timestamp.h>
+#include <arch/byteorder.h>
+#include <device/mmio.h>
+#include <device/pci_ops.h>
+#include <device/pnp_ops.h>
+#include <console/console.h>
+#include <bootblock_common.h>
+#include <northbridge/intel/sandybridge/sandybridge.h>
+#include <northbridge/intel/sandybridge/raminit_native.h>
+#include <southbridge/intel/bd82x6x/pch.h>
+#include <southbridge/intel/common/gpio.h>
+
+const struct southbridge_usb_port mainboard_usb_ports[] = {
+	{ 1, 3, 0 },
+	{ 1, 3, 1 },
+	{ 0, 1, 3 },
+	{ 1, 3, -1 },
+	{ 0, 1, 2 },
+	{ 0, 1, -1 },
+	{ 0, 1, -1 },
+	{ 0, 1, -1 },
+	{ 0, 1, -1 },
+	{ 0, 1, 5 },
+	{ 1, 1, -1 },
+	{ 0, 1, -1 },
+	{ 1, 3, -1 },
+	{ 1, 1, -1 },
+};
+
+void bootblock_mainboard_early_init(void)
+{
+	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x3f0f);
+	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0010);
+}
+
+/* FIXME: Put proper SPD map here. */
+void mainboard_get_spd(spd_raw_data *spd, bool id_only)
+{
+	read_spd(&spd[0], 0x50, id_only);
+	read_spd(&spd[1], 0x52, id_only);
+	read_spd(&spd[2], 0x51, id_only);
+	read_spd(&spd[3], 0x53, id_only);
+}