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author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-02-23 00:10:35 +0100 |
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committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-07-29 01:23:56 +0200 |
commit | 1783a3c1b571f3035a2697a1328902a01c1e3283 (patch) | |
tree | bcadaaea54075fea9d67e153916cdf6a8def0e45 /src/mainboard/lenovo/x230 | |
parent | a014521b9021f5876594e8be038dfd93a24702eb (diff) | |
download | coreboot-1783a3c1b571f3035a2697a1328902a01c1e3283.tar.xz |
ivybridge: LVDS gfx init.
Change-Id: If71e9c94922cd4283d5e175dfd8757d398a72be1
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/5285
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/mainboard/lenovo/x230')
-rw-r--r-- | src/mainboard/lenovo/x230/Kconfig | 6 | ||||
-rw-r--r-- | src/mainboard/lenovo/x230/devicetree.cb | 6 |
2 files changed, 12 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/x230/Kconfig b/src/mainboard/lenovo/x230/Kconfig index cc6228d054..f835ab45c8 100644 --- a/src/mainboard/lenovo/x230/Kconfig +++ b/src/mainboard/lenovo/x230/Kconfig @@ -13,6 +13,12 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_CMOS_DEFAULT select HAVE_ACPI_RESUME select HAVE_SMI_HANDLER + select EARLY_CBMEM_INIT + select VGA + select INTEL_EDID + select MAINBOARD_HAS_NATIVE_VGA_INIT + select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG + select IVYBRIDGE_LVDS # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb index a76de5fcd1..1a93ad8828 100644 --- a/src/mainboard/lenovo/x230/devicetree.cb +++ b/src/mainboard/lenovo/x230/devicetree.cb @@ -10,6 +10,12 @@ chip northbridge/intel/sandybridge register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms register "gpu_panel_power_backlight_on_delay" = "2100" # T3: 210ms register "gpu_panel_power_backlight_off_delay" = "2100" # T4: 210ms + register "gpu_use_spread_spectrum_clock" = "1" + register "gpu_lvds_dual_channel" = "0" + register "gpu_link_frequency_270_mhz" = "1" + register "gpu_lvds_num_lanes" = "1" + register "gpu_cpu_backlight" = "0x1155" + register "gpu_pch_backlight" = "0x11551155" device cpu_cluster 0 on chip cpu/intel/socket_rPGA989 |