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author | Sven Schnelle <svens@stackframe.org> | 2011-10-27 13:10:14 +0200 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2011-10-27 18:27:24 +0200 |
commit | e572ef6136114c3cac09b061c6888e44d39d36a5 (patch) | |
tree | 506a9a56a957798d77bd77f069e553f9df3e40e0 /src/mainboard/lenovo/x60 | |
parent | b2f173e168b5a368eab138a22be5524159532c63 (diff) | |
download | coreboot-e572ef6136114c3cac09b061c6888e44d39d36a5.tar.xz |
X60/T60: enable AHCI mode
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Change-Id: I2166ae9ee9e7e0e431583249f015d130d15fac61
Reviewed-on: http://review.coreboot.org/341
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo/x60')
-rw-r--r-- | src/mainboard/lenovo/x60/devicetree.cb | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/lenovo/x60/devicetree.cb b/src/mainboard/lenovo/x60/devicetree.cb index 000f9c7995..2f0a1792de 100644 --- a/src/mainboard/lenovo/x60/devicetree.cb +++ b/src/mainboard/lenovo/x60/devicetree.cb @@ -56,7 +56,8 @@ chip northbridge/intel/i945 register "gpi12_routing" = "1" register "gpi8_routing" = "2" - register "sata_ahci" = "0x0" + register "sata_ahci" = "0x1" + register "sata_ports_implemented" = "0x01" register "gpe0_en" = "0x11000006" register "alt_gp_smi_en" = "0x1000" |