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authorAndrey Korolyov <andrey@xdel.ru>2017-08-16 17:53:40 +0200
committerArthur Heymans <arthur@aheymans.xyz>2017-12-19 21:15:48 +0000
commit60d9ce3937f15cff56218a08d9ccfd5d0358fbfc (patch)
treebb74993aabd2ed13f087b4d2f2256b4c6b3a62e9 /src/mainboard/lenovo/z61t/mainboard.c
parent1d2aed2367b83cd2a0651fa85756c5f394c136f9 (diff)
downloadcoreboot-60d9ce3937f15cff56218a08d9ccfd5d0358fbfc.tar.xz
mainboard/lenovo: add Lenovo Z61t laptop
This platform shares most hardware components with first-gen Core Lenovo laptops such as T60/X60, with much smaller EEPROM size as one of notable differences. The port features Intel graphics, ATI-based version should work with vendor VBIOS. Tested peripherals: - sleep/resume, - USB ports, - ACPI Fn key bindings/volume buttons, - backlight control, - ethernet, - wireless (under Linux), - sound/beep, - dock handling, - serial via dock. Untested peripherals: - IrDA, - parallel port, - PCMCIA, - S-Video port, - modem, - FP reader (should just work), - IEEE1394. Linux 3.16 works with native gfxinit perfectly, with Intel VBIOS console sometimes displays nothing when i915 framebuffer is used. Windows 7 has an interrupt assignment issue with iw3945, otherwise tested stuff is fine. Change-Id: I84c89cc47d3db126d827f92d50270954bc42f224 Signed-off-by: Andrey Korolyov <andrey@xdel.ru> Reviewed-on: https://review.coreboot.org/21019 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/lenovo/z61t/mainboard.c')
-rw-r--r--src/mainboard/lenovo/z61t/mainboard.c84
1 files changed, 84 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/z61t/mainboard.c b/src/mainboard/lenovo/z61t/mainboard.c
new file mode 100644
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+++ b/src/mainboard/lenovo/z61t/mainboard.c
@@ -0,0 +1,84 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <device/pci_def.h>
+#include <device/device.h>
+#include <ec/lenovo/pmh7/pmh7.h>
+#include <ec/lenovo/h8/h8.h>
+#include <ec/acpi/ec.h>
+#include <northbridge/intel/i945/i945.h>
+#include <pc80/mc146818rtc.h>
+#include <drivers/intel/gma/int15.h>
+#include <arch/acpigen.h>
+
+#define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
+
+static acpi_cstate_t cst_entries[] = {
+ { 1, 1, 1000, { 0x7f, 1, 2, { 0 }, 1, 0 } },
+ { 2, 1, 500, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV2, 0 } },
+ { 3, 17, 250, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } },
+};
+
+int get_cst_entries(acpi_cstate_t **entries)
+{
+ *entries = cst_entries;
+ return ARRAY_SIZE(cst_entries);
+}
+
+static void mainboard_init(device_t dev)
+{
+ struct southbridge_intel_i82801gx_config *config;
+ device_t idedev;
+
+ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
+ GMA_INT15_PANEL_FIT_DEFAULT,
+ PANEL, 3);
+
+ /* If we're resuming from suspend, blink suspend LED */
+ if (acpi_is_wakeup_s3())
+ ec_write(0x0c, 0xc7);
+
+ idedev = dev_find_slot(0, PCI_DEVFN(0x1f,1));
+
+ if (!(inb(DEFAULT_GPIOBASE + 0x0c) & 0x40)) {
+ /* legacy I/O connected */
+ pmh7_ultrabay_power_enable(1);
+ ec_write(0x0c, 0x84);
+ } else if (idedev && idedev->chip_info &&
+ h8_ultrabay_device_present()) {
+ config = idedev->chip_info;
+ config->ide_enable_primary = 1;
+ pmh7_ultrabay_power_enable(1);
+ ec_write(0x0c, 0x84);
+ } else {
+ pmh7_ultrabay_power_enable(0);
+ ec_write(0x0c, 0x04);
+ }
+
+ /* set dock status led */
+ ec_write(0x0c, 0x08);
+ ec_write(0x0c, inb(0x164c) & 8 ? 0x89 : 0x09);
+}
+
+static void mainboard_enable(device_t dev)
+{
+ dev->ops->init = mainboard_init;
+}
+
+struct chip_operations mainboard_ops = {
+ .enable_dev = mainboard_enable,
+};