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author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-10-17 10:56:26 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-23 15:52:09 +0000 |
commit | a342f3937e7ce159fd170ab8cd26ba799a3bc9e4 (patch) | |
tree | 4bd4540ba11286f465272c1fbee62dbf5f9789f8 /src/mainboard/lenovo/z61t/romstage.c | |
parent | 9856892297ad997f586a1b4dd0a494f3764a0ce2 (diff) | |
download | coreboot-a342f3937e7ce159fd170ab8cd26ba799a3bc9e4.tar.xz |
src: Remove unneeded whitespace
Change-Id: I6c77f4289b46646872731ef9c20dc115f0cf876d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29161
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo/z61t/romstage.c')
-rw-r--r-- | src/mainboard/lenovo/z61t/romstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/lenovo/z61t/romstage.c b/src/mainboard/lenovo/z61t/romstage.c index 94c8a8fe03..d5dc9f57f5 100644 --- a/src/mainboard/lenovo/z61t/romstage.c +++ b/src/mainboard/lenovo/z61t/romstage.c @@ -183,7 +183,7 @@ void mainboard_romstage_entry(unsigned long bist) /* We want early GPIO setup, to be able to detect legacy I/O module */ pci_write_config32(PCI_DEV(0, 0x1f, 0), GPIOBASE, DEFAULT_GPIOBASE | 1); /* Enable GPIOs */ - pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x4c /* GC */ , 0x10); + pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x4c /* GC */, 0x10); setup_pch_gpios(&mainboard_gpio_map); dock_err = dlpc_init(); |