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authorNico Huber <nico.h@gmx.de>2017-05-22 19:23:39 +0200
committerNico Huber <nico.h@gmx.de>2017-05-25 17:04:14 +0200
commit36dafd88bcff01a67ce2ee4ddd32026f0b439c70 (patch)
tree2fa0f0581d4900dd92f7a00a60fa0b60d8a899cb /src/mainboard/lenovo
parent41f937382d3631c4b9e7ff3744fb68535044da8b (diff)
downloadcoreboot-36dafd88bcff01a67ce2ee4ddd32026f0b439c70.tar.xz
mb/lenovo/x200/blc: Add LTD121EQ3B panel at 447Hz
Change-Id: Ia44097f32f74ffd749219415984224ce33d9252b Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/19816 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/lenovo')
-rw-r--r--src/mainboard/lenovo/x200/blc.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/x200/blc.c b/src/mainboard/lenovo/x200/blc.c
index 3d35460552..3f8aadb637 100644
--- a/src/mainboard/lenovo/x200/blc.c
+++ b/src/mainboard/lenovo/x200/blc.c
@@ -18,6 +18,8 @@
#include <northbridge/intel/gm45/gm45.h>
static const struct blc_pwm_t blc_entries[] = {
+ /* corrected to 320MHz CDClk, vendor set 753; works fine at both: */
+ {"LTD121EQ3B", 447},
{"LTD121EWVB", 165},
{"B121EW03 V6 ", 165},
/* datasheets: between 100 and 20k, typical 200 */