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authorVladimir Serbinenko <phcoder@gmail.com>2014-01-10 19:43:33 +0100
committerVladimir Serbinenko <phcoder@gmail.com>2014-01-20 11:44:55 +0100
commit484a5bfffeed234f998ededbc3a7ec927bc2569b (patch)
treecd86314b6e82aac526913b7bdaa879be1b6696cb /src/mainboard/lenovo
parentdf7d5c9e0671486004c42f4f57b79bf9beafba51 (diff)
downloadcoreboot-484a5bfffeed234f998ededbc3a7ec927bc2569b.tar.xz
X201: Fix SMI bindings.
Doesn't have a visible effect currently but it's better if those bindings are correct. Change-Id: I0f1a468e59429b14db139cc48e1e68c0e1841300 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4645 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/lenovo')
-rw-r--r--src/mainboard/lenovo/x201/Makefile.inc1
-rw-r--r--src/mainboard/lenovo/x201/smihandler.c21
2 files changed, 21 insertions, 1 deletions
diff --git a/src/mainboard/lenovo/x201/Makefile.inc b/src/mainboard/lenovo/x201/Makefile.inc
index 9055c9eab3..285e0d0a28 100644
--- a/src/mainboard/lenovo/x201/Makefile.inc
+++ b/src/mainboard/lenovo/x201/Makefile.inc
@@ -18,6 +18,7 @@
##
smm-$(CONFIG_HAVE_SMI_HANDLER) += dock.c
+smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
romstage-y += dock.c
ramstage-y += dock.c
ramstage-y += gma.c
diff --git a/src/mainboard/lenovo/x201/smihandler.c b/src/mainboard/lenovo/x201/smihandler.c
index e99030b74a..052981877d 100644
--- a/src/mainboard/lenovo/x201/smihandler.c
+++ b/src/mainboard/lenovo/x201/smihandler.c
@@ -24,6 +24,9 @@
#include <cpu/x86/smm.h>
#include "southbridge/intel/ibexpeak/nvs.h"
#include "southbridge/intel/ibexpeak/pch.h"
+#include "southbridge/intel/ibexpeak/me.h"
+#include <northbridge/intel/sandybridge/sandybridge.h>
+#include <cpu/intel/model_2065x/model_2065x.h>
#include <ec/acpi/ec.h>
#include <pc80/mc146818rtc.h>
#include <ec/lenovo/h8/h8.h>
@@ -134,10 +137,12 @@ static void mainboard_smi_handle_ec_sci(void)
void mainboard_smi_gpi(u32 gpi_sts)
{
- if (gpi_sts & (1 << 12))
+ if (gpi_sts & (1 << 1))
mainboard_smi_handle_ec_sci();
}
+static int mainboard_finalized = 0;
+
int mainboard_smi_apmc(u8 data)
{
u16 pmbase = pci_read_config16(PCI_DEV(0, 0x1f, 0), 0x40) & 0xfffc;
@@ -150,6 +155,20 @@ int mainboard_smi_apmc(u8 data)
return 0;
switch (data) {
+ case APM_CNT_FINALIZE:
+ printk(BIOS_DEBUG, "APMC: FINALIZE\n");
+ if (mainboard_finalized) {
+ printk(BIOS_DEBUG, "APMC#: Already finalized\n");
+ return 0;
+ }
+
+ intel_me_finalize_smm();
+ intel_pch_finalize_smm();
+ intel_sandybridge_finalize_smm();
+ intel_model_2065x_finalize_smm();
+
+ mainboard_finalized = 1;
+ break;
case APM_CNT_ACPI_ENABLE:
/* use 0x1600/0x1604 to prevent races with userspace */
ec_set_ports(0x1604, 0x1600);