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authorArthur Heymans <arthur@aheymans.xyz>2016-05-19 16:06:09 +0200
committerMartin Roth <martinroth@google.com>2016-08-31 20:01:05 +0200
commit874a8f961ff537bc12cfca3d9937a07fcda2fe6e (patch)
treee9c9c1ba17c4ec15b5401a03350f06cf21a43c40 /src/mainboard/lenovo
parent868cd7128262ca8442301c2910ed843ab3f193ff (diff)
downloadcoreboot-874a8f961ff537bc12cfca3d9937a07fcda2fe6e.tar.xz
i945: Enable changing VRAM size
On i945 the vram size is the default 8mb. It is also possible to set it 1mb or 0mb hardcoding the GGC register in early_init.c The intel documentation on i945, "Mobile IntelĀ® 945 Express Chipset Family datasheet june 2008" only documents those three options. They are set using 3 bits. The documententation also makes mention of 4mb, 16mb, 32mb, 48mb, 64mb but not how to set it. The other non documented (straight forward) bit combinations allow to change the VRAM size to those other states. What this patch does is: - add those undocumented registers with their respective vram size to the i945 NB code; - make this a cmos option on targets that have this northbridge. TEST: build, flash to target, set cmos as desired and boot linux. On Debian it can be found using "dmesg | grep stolen". NOTE: dmesg message about reserved vram are quite different depending on linux version Change-Id: Ia71367ae3efb51bd64affd728407b8386e74594f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/14819 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/lenovo')
-rw-r--r--src/mainboard/lenovo/t60/cmos.default1
-rw-r--r--src/mainboard/lenovo/t60/cmos.layout12
-rw-r--r--src/mainboard/lenovo/x60/cmos.default1
-rw-r--r--src/mainboard/lenovo/x60/cmos.layout11
4 files changed, 23 insertions, 2 deletions
diff --git a/src/mainboard/lenovo/t60/cmos.default b/src/mainboard/lenovo/t60/cmos.default
index 5dd0c707f5..03b92e3d0f 100644
--- a/src/mainboard/lenovo/t60/cmos.default
+++ b/src/mainboard/lenovo/t60/cmos.default
@@ -18,3 +18,4 @@ fn_ctrl_swap=Disable
sticky_fn=Disable
power_management_beeps=Enable
low_battery_beep=Enable
+gfx_uma_size=8M \ No newline at end of file
diff --git a/src/mainboard/lenovo/t60/cmos.layout b/src/mainboard/lenovo/t60/cmos.layout
index 12e7d86c5a..2cd4e7b7ba 100644
--- a/src/mainboard/lenovo/t60/cmos.layout
+++ b/src/mainboard/lenovo/t60/cmos.layout
@@ -57,7 +57,9 @@ entries
# coreboot config options: southbridge
408 1 e 1 nmi
#409 2 e 7 power_on_after_fail
-#411 5 r 0 unused
+
+# coreboot config options: northbridge
+411 3 e 11 gfx_uma_size
# coreboot config options: bootloader
416 512 s 0 boot_devices
@@ -127,6 +129,14 @@ enumerations
8 1 Yes
9 0 Secondary
9 1 Primary
+11 0 1M
+11 1 4M
+11 2 8M
+11 3 16M
+11 4 32M
+11 5 48M
+11 6 64M
+
# -----------------------------------------------------------------
checksums
diff --git a/src/mainboard/lenovo/x60/cmos.default b/src/mainboard/lenovo/x60/cmos.default
index 3579757323..4e72734b72 100644
--- a/src/mainboard/lenovo/x60/cmos.default
+++ b/src/mainboard/lenovo/x60/cmos.default
@@ -18,3 +18,4 @@ fn_ctrl_swap=Disable
sticky_fn=Disable
power_management_beeps=Enable
low_battery_beep=Enable
+gfx_uma_size=8M \ No newline at end of file
diff --git a/src/mainboard/lenovo/x60/cmos.layout b/src/mainboard/lenovo/x60/cmos.layout
index 2d9fe41b02..3e316c918c 100644
--- a/src/mainboard/lenovo/x60/cmos.layout
+++ b/src/mainboard/lenovo/x60/cmos.layout
@@ -57,7 +57,9 @@ entries
# coreboot config options: southbridge
408 1 e 1 nmi
#409 2 e 7 power_on_after_fail
-#411 5 r 0 unused
+
+# coreboot config options: northbridge
+411 3 e 11 gfx_uma_size
# coreboot config options: bootloader
416 512 s 0 boot_devices
@@ -127,6 +129,13 @@ enumerations
8 1 Yes
9 0 Secondary
9 1 Primary
+11 0 1M
+11 1 4M
+11 2 8M
+11 3 16M
+11 4 32M
+11 5 48M
+11 6 64M
# -----------------------------------------------------------------
checksums