nb/intel/nehalem: Move to C_ENVIRONMENT_BOOTBLOCK

A few notable changes:
- Microcode init is done in assembly during the CAR init.
- The DCACHE_BSP_STACK_SIZE is set to 0x2000, which is the same size
  against which the romstage stack guards protected.
- The romstage mainboard_lpc_init() hook is removed in favor of the
  existing bootblock_mainboard_early_init().

Change-Id: Iccd7ceaa35db49e170bfb901bbff1c1a11223c63
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35951
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

3 files changed, 28 insertions, 6 deletions

diff --git a/src/mainboard/lenovo/x201/Makefile.inc b/src/mainboard/lenovo/x201/Makefile.inc
index f97235612e..548beff15d 100644
--- a/src/mainboard/lenovo/x201/Makefile.inc
+++ b/src/mainboard/lenovo/x201/Makefile.inc
@@ -13,6 +13,8 @@
 ## GNU General Public License for more details.
 ##
 
+bootblock-y += early_init.c
+
 smm-y += dock.c
 smm-y += smihandler.c
 romstage-y += dock.c
diff --git a/src/mainboard/lenovo/x201/early_init.c b/src/mainboard/lenovo/x201/early_init.c
new file mode 100644
index 0000000000..7383381ce9
--- /dev/null
+++ b/src/mainboard/lenovo/x201/early_init.c
@@ -0,0 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
+ * Copyright (C) 2013 Vladimir Serbinenko <phcoder@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootblock_common.h>
+#include <ec/acpi/ec.h>
+
+void bootblock_mainboard_early_init(void)
+{
+	/* Enable USB Power. We need to do it early for usbdebug to work. */
+	ec_set_bit(0x3b, 4);
+}
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c
index 81752e88ae..99875ed65a 100644
--- a/src/mainboard/lenovo/x201/romstage.c
+++ b/src/mainboard/lenovo/x201/romstage.c
@@ -24,12 +24,6 @@
 #include <southbridge/intel/ibexpeak/pch.h>
 #include <northbridge/intel/nehalem/nehalem.h>
 
-void mainboard_lpc_init(void)
-{
-	/* Enable USB Power. We need to do it early for usbdebug to work. */
-	ec_set_bit(0x3b, 4);
-}
-
 const struct southbridge_usb_port mainboard_usb_ports[] = {
 	/* Enabled, Current table lookup index, OC map */
 	{ 1, IF1_557, 0 },