summaryrefslogtreecommitdiff
path: root/src/mainboard/lenovo
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2019-05-12 14:11:00 +0200
committerPatrick Rudolph <siro@das-labor.org>2019-05-14 06:59:48 +0000
commit57459dbeacb4759c3352206464b6c19b7add00d5 (patch)
tree18a030d42552d34533202442c93a3ee5c71ae3cd /src/mainboard/lenovo
parent55cb5f8de53366c9df10ed9307cc9088c96191cf (diff)
downloadcoreboot-57459dbeacb4759c3352206464b6c19b7add00d5.tar.xz
mb/{lenovo/x201,packardbell/ms2290}: Remove superfluous TS init
Timestamps are initialized in cpu/intel/car/romstage.c. Change-Id: Ia2b762667be17aa5b482cd585dd6f6198cf50d9e Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32758 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Alexander Couzens <lynxis@fe80.eu> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo')
-rw-r--r--src/mainboard/lenovo/x201/romstage.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c
index 7e895b46f0..ae154e25b1 100644
--- a/src/mainboard/lenovo/x201/romstage.c
+++ b/src/mainboard/lenovo/x201/romstage.c
@@ -175,10 +175,6 @@ void mainboard_romstage_entry(unsigned long bist)
int s3resume = 0;
const u8 spd_addrmap[4] = { 0x50, 0, 0x51, 0 };
- timestamp_init(timestamp_get());
-
- timestamp_add_now(TS_START_ROMSTAGE);
-
if (bist == 0)
enable_lapic();