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authorVladimir Serbinenko <phcoder@gmail.com>2014-01-28 00:05:29 +0100
committerVladimir Serbinenko <phcoder@gmail.com>2014-03-01 00:45:28 +0100
commit770c71f3ec6a002c83f4a6fd9d1ee20096aa9acb (patch)
treec2e3a804d9dd64aceddd9b4c15dc64f99201ac55 /src/mainboard/lenovo
parentf0e025a386ab79166c2711a022a813fda874da63 (diff)
downloadcoreboot-770c71f3ec6a002c83f4a6fd9d1ee20096aa9acb.tar.xz
lenovo/x201: Move mainboard init to mainboard_init.
Rather than having it inside mainboard_enable. Change-Id: Ie8bd25eb49b919b4e25c4628e3557fc66b2ba4d9 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4840 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/lenovo')
-rw-r--r--src/mainboard/lenovo/x201/mainboard.c37
1 files changed, 21 insertions, 16 deletions
diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c
index c16c3a4ccc..cf42a9bf4a 100644
--- a/src/mainboard/lenovo/x201/mainboard.c
+++ b/src/mainboard/lenovo/x201/mainboard.c
@@ -104,11 +104,8 @@ static void verb_setup(void)
cim_verb_data_size = sizeof(mainboard_cim_verb_data);
}
-static void mainboard_enable(device_t dev)
+static void mainboard_init(device_t dev)
{
- device_t dev0;
- u16 pmbase;
-
printk(BIOS_SPEW, "starting SPI configuration\n");
/* Configure SPI. */
@@ -134,6 +131,26 @@ static void mainboard_enable(device_t dev)
RCBA32(0x3804) = 0x3f04e008;
printk(BIOS_SPEW, "SPI configured\n");
+ /* This sneaked in here, because X201 SuperIO chip isn't really
+ connected to anything and hence we don't init it.
+ */
+ pc_keyboard_init(0);
+
+ /* Enable expresscard hotplug events. */
+ pci_write_config32(dev_find_slot(0, PCI_DEVFN(0x1c, 3)),
+ 0xd8,
+ pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x1c, 3)), 0xd8)
+ | (1 << 30));
+ pci_write_config16(dev_find_slot(0, PCI_DEVFN(0x1c, 3)),
+ 0x42, 0x142);
+}
+
+static void mainboard_enable(device_t dev)
+{
+ device_t dev0;
+ u16 pmbase;
+
+ dev->ops->init = mainboard_init;
pmbase = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x1f, 0)),
PMBASE) & 0xff80;
@@ -158,19 +175,7 @@ static void mainboard_enable(device_t dev)
mainboard_interrupt_handlers(0x15, &int15_handler);
#endif
- /* This sneaked in here, because X201 SuperIO chip isn't really
- connected to anything and hence we don't init it.
- */
- pc_keyboard_init(0);
verb_setup();
-
- /* Enable expresscard hotplug events. */
- pci_write_config32(dev_find_slot(0, PCI_DEVFN(0x1c, 3)),
- 0xd8,
- pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x1c, 3)), 0xd8)
- | (1 << 30));
- pci_write_config16(dev_find_slot(0, PCI_DEVFN(0x1c, 3)),
- 0x42, 0x142);
}
struct chip_operations mainboard_ops = {