diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-17 20:51:08 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-26 21:08:41 +0000 |
| commit | cd7a70f4879ff6e0f3e334ddf1031ccf0c0d31cf (patch) | |
| tree | b0438431df0943ab5f0fa9d80a99fc265130ac23 /src/mainboard/lenovo | |
| parent | 16248e89ecf73a76e5d9e9e2de46146f7ffece88 (diff) | |
| download | coreboot-cd7a70f4879ff6e0f3e334ddf1031ccf0c0d31cf.tar.xz | |
soc/intel: Use common romstage code
This provides stack guards with checking and common
entry into postcar.
The code in cpu/intel/car/romstage.c is candidate
for becoming architectural so function prototype
is moved to <arch/romstage.h>.
Change-Id: I4c5a9789e7cf3f7f49a4a33e21dac894320a9639
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34893
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo')
| -rw-r--r-- | src/mainboard/lenovo/t60/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/lenovo/thinkcentre_a58/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/lenovo/x201/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/lenovo/x60/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/lenovo/z61t/romstage.c | 2 |
5 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c index 243e16112e..9e832208b5 100644 --- a/src/mainboard/lenovo/t60/romstage.c +++ b/src/mainboard/lenovo/t60/romstage.c @@ -24,7 +24,7 @@ #include <device/pnp_def.h> #include <cpu/x86/lapic.h> #include <console/console.h> -#include <cpu/intel/romstage.h> +#include <arch/romstage.h> #include <northbridge/intel/i945/i945.h> #include <northbridge/intel/i945/raminit.h> #include <southbridge/intel/i82801gx/i82801gx.h> diff --git a/src/mainboard/lenovo/thinkcentre_a58/romstage.c b/src/mainboard/lenovo/thinkcentre_a58/romstage.c index bbb73dd57c..e4abab5770 100644 --- a/src/mainboard/lenovo/thinkcentre_a58/romstage.c +++ b/src/mainboard/lenovo/thinkcentre_a58/romstage.c @@ -20,7 +20,7 @@ #include <southbridge/intel/common/gpio.h> #include <southbridge/intel/common/pmclib.h> #include <northbridge/intel/x4x/x4x.h> -#include <cpu/intel/romstage.h> +#include <arch/romstage.h> #include <device/pci_ops.h> #include <superio/smsc/smscsuperio/smscsuperio.h> #include <northbridge/intel/x4x/iomap.h> diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c index 067528b87b..3a06a8cd93 100644 --- a/src/mainboard/lenovo/x201/romstage.c +++ b/src/mainboard/lenovo/x201/romstage.c @@ -23,7 +23,7 @@ #include <cpu/x86/lapic.h> #include <romstage_handoff.h> #include <console/console.h> -#include <cpu/intel/romstage.h> +#include <arch/romstage.h> #include <ec/acpi/ec.h> #include <timestamp.h> #include <arch/acpi.h> diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c index 2b8a9badba..5a8ab942bc 100644 --- a/src/mainboard/lenovo/x60/romstage.c +++ b/src/mainboard/lenovo/x60/romstage.c @@ -25,7 +25,7 @@ #include <cpu/x86/lapic.h> #include <arch/acpi.h> #include <console/console.h> -#include <cpu/intel/romstage.h> +#include <arch/romstage.h> #include <northbridge/intel/i945/i945.h> #include <northbridge/intel/i945/raminit.h> #include <southbridge/intel/i82801gx/i82801gx.h> diff --git a/src/mainboard/lenovo/z61t/romstage.c b/src/mainboard/lenovo/z61t/romstage.c index 8946179c4a..7f12091ced 100644 --- a/src/mainboard/lenovo/z61t/romstage.c +++ b/src/mainboard/lenovo/z61t/romstage.c @@ -24,7 +24,7 @@ #include <device/pnp_def.h> #include <cpu/x86/lapic.h> #include <console/console.h> -#include <cpu/intel/romstage.h> +#include <arch/romstage.h> #include <northbridge/intel/i945/i945.h> #include <northbridge/intel/i945/raminit.h> #include <southbridge/intel/i82801gx/i82801gx.h> |