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authorNico Huber <nico.h@gmx.de>2020-07-06 21:14:02 +0200
committerNico Huber <nico.h@gmx.de>2020-07-07 19:30:47 +0000
commit3452cb1359229b0457e9e1f6282c67fd459d4c90 (patch)
treef53081633f4c282b9c99cd28e5aa3d90bfaf7f84 /src/mainboard/lenovo
parent5d16a25e0cece666e9275a1c627050bfd918b6ac (diff)
downloadcoreboot-3452cb1359229b0457e9e1f6282c67fd459d4c90.tar.xz
mb/lenovo/t60: Fix override devicetrees
When converting to override trees in commit c1dc2d5e68 (mb/lenovo/t60: Switch to override tree), some device nodes were missed. These are essential, as `chip` configuration data is always tied to device nodes. The resulting `static.c` contained multiple copies of the `chip` configuration structs, but the wrong ones were hooked up. The therefore missing configuration of the clock gen led to general instability, especially with SMP under Linux (probably due to the attempt to enter lower C states on an idle core). Passing `maxcpus=1` to the Linux kernel served as a workaround. Change-Id: I6c26d633d1860cf9a5415994444e75ae1c2e59ad Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43150 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo')
-rw-r--r--src/mainboard/lenovo/t60/variants/t60/overridetree.cb2
-rw-r--r--src/mainboard/lenovo/t60/variants/z61t/overridetree.cb1
2 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t60/variants/t60/overridetree.cb b/src/mainboard/lenovo/t60/variants/t60/overridetree.cb
index dc6abfb061..c58884a4b5 100644
--- a/src/mainboard/lenovo/t60/variants/t60/overridetree.cb
+++ b/src/mainboard/lenovo/t60/variants/t60/overridetree.cb
@@ -29,6 +29,7 @@ chip northbridge/intel/i945
register "has_bdc_detection" = "1"
register "bdc_gpio_num" = "7"
register "bdc_gpio_lvl" = "0"
+ device pnp ff.2 on end
end
chip superio/nsc/pc87384
device pnp 2e.2 off # Serial Port / IR
@@ -47,6 +48,7 @@ chip northbridge/intel/i945
register "regs" = "{ 0x2e, 0xf7, 0x3c,
0x20, 0x01, 0x00, 0x1b, 0x01,
0x54, 0xff, 0xff, 0x07 }"
+ device i2c 69 on end
end
end
end
diff --git a/src/mainboard/lenovo/t60/variants/z61t/overridetree.cb b/src/mainboard/lenovo/t60/variants/z61t/overridetree.cb
index 9bac582af1..00f3f198e3 100644
--- a/src/mainboard/lenovo/t60/variants/z61t/overridetree.cb
+++ b/src/mainboard/lenovo/t60/variants/z61t/overridetree.cb
@@ -42,6 +42,7 @@ chip northbridge/intel/i945
# vendor clockgen setup
register "regs" = "{ 0x6d, 0xff, 0xff,
0x20, 0x41, 0x7f, 0x18, 0x00 }"
+ device i2c 69 on end
end
end
end