summaryrefslogtreecommitdiff
path: root/src/mainboard/lenovo
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2020-07-03 20:36:50 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-12 10:05:36 +0000
commit9a369718d668601da13030e9b57cd1a3e313cf5d (patch)
treec35f3283c38070998541b02a39910235c9617558 /src/mainboard/lenovo
parentd7bf3ad9397a367021e57d204438a178022aaa8c (diff)
downloadcoreboot-9a369718d668601da13030e9b57cd1a3e313cf5d.tar.xz
haswell: Factor out `max_ddr3_freq`
All mainboards choose the maximum speed of DDR3-1600. Change-Id: I8863f9d1df950b924f596689ebf1bfda5d317e06 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43120 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo')
-rw-r--r--src/mainboard/lenovo/t440p/romstage.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/lenovo/t440p/romstage.c b/src/mainboard/lenovo/t440p/romstage.c
index 53088d6826..23a12aabb7 100644
--- a/src/mainboard/lenovo/t440p/romstage.c
+++ b/src/mainboard/lenovo/t440p/romstage.c
@@ -50,7 +50,6 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
pei_data->spd_addresses[2] = 0xa2;
pei_data->ec_present = 1;
pei_data->gbe_enable = 1;
- pei_data->max_ddr3_freq = 1600;
struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
/* Length, Enable, OCn#, Location */