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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-05-28 10:10:25 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-15 20:55:28 +0000 |
| commit | 5ea2e405dad22930db8f5e8dcf1a1fe383284919 (patch) | |
| tree | 05632db2f44ecd115d992ee845ec857281a721a9 /src/mainboard/lenovo | |
| parent | 279d8b5f3d31fe95c9c403dd12b4d5d02551b6ea (diff) | |
| download | coreboot-5ea2e405dad22930db8f5e8dcf1a1fe383284919.tar.xz | |
mb/*/{x201,ms2290}/mainboard.c: Remove superfluous ramstage code
Change-Id: I0270c50dea2a2ce6c8e6114ed708f06be9d33c0e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33141
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/lenovo')
| -rw-r--r-- | src/mainboard/lenovo/x201/mainboard.c | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c index 96033f88df..56c439bb58 100644 --- a/src/mainboard/lenovo/x201/mainboard.c +++ b/src/mainboard/lenovo/x201/mainboard.c @@ -35,23 +35,8 @@ static void fill_ssdt(struct device *device) static void mainboard_enable(struct device *dev) { - u16 pmbase; - dev->ops->acpi_fill_ssdt_generator = fill_ssdt; - pmbase = pci_read_config32(pcidev_on_root(0x1f, 0), - PMBASE) & 0xff80; - - printk(BIOS_SPEW, " ... pmbase = 0x%04x\n", pmbase); - - outl(0, pmbase + SMI_EN); - - enable_lapic(); - pci_write_config32(pcidev_on_root(0x1f, 0), GPIO_BASE, - DEFAULT_GPIOBASE | 1); - pci_write_config8(pcidev_on_root(0x1f, 0), GPIO_CNTL, - 0x10); - /* If we're resuming from suspend, blink suspend LED */ if (acpi_is_wakeup_s3()) ec_write(0x0c, 0xc7); |