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| author | Sven Schnelle <svens@stackframe.org> | 2011-03-01 19:58:47 +0000 |
|---|---|---|
| committer | Sven Schnelle <svens@stackframe.org> | 2011-03-01 19:58:47 +0000 |
| commit | 91321028ec3fac017e8e2c47ec5fe7742409b3b0 (patch) | |
| tree | 738f9e0d9f124ef4670c5e21516695fc63fc6d46 /src/mainboard/lenovo | |
| parent | 270a908646273461b41e591739d778d3d675ff6f (diff) | |
| download | coreboot-91321028ec3fac017e8e2c47ec5fe7742409b3b0.tar.xz | |
Use subsystem id from devicetree.cb instead of Kconfig and move
all boards to the new config scheme.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6421 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/lenovo')
| -rw-r--r-- | src/mainboard/lenovo/x60/devicetree.cb | 73 |
1 files changed, 49 insertions, 24 deletions
diff --git a/src/mainboard/lenovo/x60/devicetree.cb b/src/mainboard/lenovo/x60/devicetree.cb index 40e16b3d02..2817255e82 100644 --- a/src/mainboard/lenovo/x60/devicetree.cb +++ b/src/mainboard/lenovo/x60/devicetree.cb @@ -22,17 +22,23 @@ chip northbridge/intel/i945 - device lapic_cluster 0 on - chip cpu/intel/socket_mFCPGA478 - device lapic 0 on end - end - end - - device pci_domain 0 on - device pci 00.0 on end # host bridge - device pci 02.0 on end # vga controller - device pci 02.1 on end # display controller - chip southbridge/intel/i82801gx + device lapic_cluster 0 on + chip cpu/intel/socket_mFCPGA478 + device lapic 0 on end + end + end + + device pci_domain 0 on + device pci 00.0 on # Host bridge + subsystemid 0x17aa 0x2017 + end + device pci 02.0 on # VGA controller + subsystemid 0x17aa 0x201a + end + device pci 02.1 on # display controller + subsystemid 0x17aa 0x201a + end + chip southbridge/intel/i82801gx register "pirqa_routing" = "0x0b" register "pirqb_routing" = "0x0b" register "pirqc_routing" = "0x0b" @@ -46,23 +52,36 @@ chip northbridge/intel/i945 # 0 No effect (default) # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) # 2 SCI (if corresponding GPIO_EN bit is also set) - register "gpi13_routing" = "2" - register "gpi12_routing" = "2" - register "gpi8_routing" = "2" + register "gpi13_routing" = "2" + register "gpi12_routing" = "2" + register "gpi8_routing" = "2" - register "sata_ahci" = "0x0" + register "sata_ahci" = "0x0" register "gpe0_en" = "0x11000006" - device pci 1b.0 on end # Audio Controller + device pci 1b.0 on # Audio Cnotroller + subsystemid 0x17aa 0x2010 + end device pci 1c.0 on end # Ethernet device pci 1c.1 on end # Atheros WLAN - device pci 1d.0 on end # USB UHCI - device pci 1d.1 on end # USB UHCI - device pci 1d.2 on end # USB UHCI - device pci 1d.3 on end # USB UHCI - device pci 1d.7 on end # USB2 EHCI + device pci 1d.0 on # USB UHCI + subsystemid 0x17aa 0x200a + end + device pci 1d.1 on # USB UHCI + subsystemid 0x17aa 0x200a + end + device pci 1d.2 on # USB UHCI + subsystemid 0x17aa 0x200a + end + device pci 1d.3 on # USB UHCI + subsystemid 0x17aa 0x200a + end + device pci 1d.7 on # USB2 EHCI + subsystemid 0x17aa 0x200b + end device pci 1f.0 on # PCI-LPC bridge + subsystemid 0x17aa 0x2009 chip ec/lenovo/pmh7 device pnp ff.1 on # dummy end @@ -120,9 +139,15 @@ chip northbridge/intel/i945 end end end - device pci 1f.1 off end # IDE - device pci 1f.2 on end # SATA - device pci 1f.3 on end # SMBus + device pci 1f.1 off # IDE + subsystemid 0x17aa 0x200c + end + device pci 1f.2 on # SATA + subsystemid 0x17aa 0x200d + end + device pci 1f.3 on # SMBUS + subsystemid 0x17aa 0x200f + end end chip southbridge/ricoh/rl5c476 end |