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| author | Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> | 2020-07-24 02:51:30 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-08-20 19:42:05 +0000 |
| commit | 1916f8969b10e27fe06b3e0eb1caae632bd947f6 (patch) | |
| tree | a482b80bf5c9394c16c6e3076e43810b645bf3d1 /src/mainboard/libretrend | |
| parent | dcae8074bf7f575a267b4253b1242e5cbc9565c7 (diff) | |
| download | coreboot-1916f8969b10e27fe06b3e0eb1caae632bd947f6.tar.xz | |
soc/amd/acpi: Move ACPI IVRS generation to coreboot
Add code for IVRS generation to coreboot. Publish coreboot generated
structure rather than IVRS generated by FSP binary.
Reference Doc: 48882_IOMMU_3.05_PUB.pdf
BUG=b:155307433
TEST=Boot trembyle to shell and extract and compare IVRS tables and make
sure they cover the same devices.
Change-Id: I693f4399766c71c3ad53539634c65ba59afd0fe1
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43804
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/libretrend')
0 files changed, 0 insertions, 0 deletions