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author | Christian Gmeiner <christian.gmeiner@gmail.com> | 2013-06-04 17:34:35 +0200 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-06-04 17:56:35 +0200 |
commit | c4e07bb50345f1b95ae2f80fc42694d3533c628e (patch) | |
tree | 50a352906a905c42535819cbe7ec4a6ef991c5be /src/mainboard/lippert/literunner-lx | |
parent | 4eb5aa2894b1115909a672470bb22c7804c20561 (diff) | |
download | coreboot-c4e07bb50345f1b95ae2f80fc42694d3533c628e.tar.xz |
AMD Northbridge LX: convert spd_read_byte() to non-static version
Change-Id: Ie329606852dfd7109acb694e9a9ff851b023cc63
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-on: http://review.coreboot.org/3369
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/lippert/literunner-lx')
-rw-r--r-- | src/mainboard/lippert/literunner-lx/romstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/lippert/literunner-lx/romstage.c b/src/mainboard/lippert/literunner-lx/romstage.c index ea7ac308cf..ef2771a794 100644 --- a/src/mainboard/lippert/literunner-lx/romstage.c +++ b/src/mainboard/lippert/literunner-lx/romstage.c @@ -75,7 +75,7 @@ static const unsigned char spdbytes[] = { // 4x Promos V58C2512164SA-J5I [SPD_tRFC] = 70 // SDRAM Device Minimum Auto Refresh to Active/Auto Refresh [70 ns] }; -static inline int spd_read_byte(unsigned int device, unsigned int address) +int spd_read_byte(unsigned int device, unsigned int address) { if (device != DIMM0) return 0xFF; /* No DIMM1, don't even try. */ |