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author | Patrick Georgi <patrick@georgi-clan.de> | 2010-11-20 10:31:00 +0000 |
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committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-11-20 10:31:00 +0000 |
commit | 9bd9a90d6a0a47ede6286e2c5599ae7335e4b96a (patch) | |
tree | 325b7b6abc1d4514d52ad1f726d9be4fa00d0454 /src/mainboard/lippert/roadrunner-lx | |
parent | 622824cadbbbe003bc3e8c97694d2cf6bae0de9b (diff) | |
download | coreboot-9bd9a90d6a0a47ede6286e2c5599ae7335e4b96a.tar.xz |
Unify DIMM SPD addressing. For Geode, change the
addressing scheme to match the rest of the tree
(0x50 instead of 0xa0).
abuild tested.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/lippert/roadrunner-lx')
-rw-r--r-- | src/mainboard/lippert/roadrunner-lx/romstage.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/lippert/roadrunner-lx/romstage.c b/src/mainboard/lippert/roadrunner-lx/romstage.c index 11524c4f4c..086a61d8f1 100644 --- a/src/mainboard/lippert/roadrunner-lx/romstage.c +++ b/src/mainboard/lippert/roadrunner-lx/romstage.c @@ -33,6 +33,7 @@ #include <cpu/amd/lxdef.h> #include <cpu/amd/geode_post_code.h> #include "southbridge/amd/cs5536/cs5536.h" +#include <spd.h> #include "southbridge/amd/cs5536/cs5536_early_smbus.c" #include "southbridge/amd/cs5536/cs5536_early_setup.c" @@ -41,8 +42,6 @@ #define ManualConf 1 /* No automatic strapped PLL config */ #define PLLMSRhi 0x0000049C /* Manual settings for the PLL */ #define PLLMSRlo 0x00DE6001 -#define DIMM0 0xA0 -#define DIMM1 0xA2 static inline int spd_read_byte(unsigned int device, unsigned int address) { |