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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-04-27 00:41:50 +1000
committerRudolf Marek <r.marek@assembler.cz>2014-05-11 17:52:08 +0200
commitf29200240e428761827ab8d179fa23068bfa9d59 (patch)
treee8f20cf76e224a08152c46196894479bd6105436 /src/mainboard/lippert/spacerunner-lx
parent946bee1c349db6bf88b4f6736dc910eb4890a74b (diff)
downloadcoreboot-f29200240e428761827ab8d179fa23068bfa9d59.tar.xz
superio/ite/*: Factor out generic romstage component
Following the reasoning of: cf7b498 superio/fintek/*: Factor out generic romstage component Change-Id: I4c0a9a5a7786eb8fcb0c3ed6251c7fe9bbbadae7 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5585 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
Diffstat (limited to 'src/mainboard/lippert/spacerunner-lx')
-rw-r--r--src/mainboard/lippert/spacerunner-lx/romstage.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/mainboard/lippert/spacerunner-lx/romstage.c b/src/mainboard/lippert/spacerunner-lx/romstage.c
index 59bd618eb1..9d5539e2bb 100644
--- a/src/mainboard/lippert/spacerunner-lx/romstage.c
+++ b/src/mainboard/lippert/spacerunner-lx/romstage.c
@@ -35,9 +35,13 @@
#include "southbridge/amd/cs5536/cs5536.h"
#include "southbridge/amd/cs5536/early_smbus.c"
#include "southbridge/amd/cs5536/early_setup.c"
-#include "superio/ite/it8712f/early_serial.c"
+#include <superio/ite/common/ite.h>
+#include <superio/ite/it8712f/it8712f.h>
#include "northbridge/amd/lx/raminit.h"
+#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
+#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
+
/* Bit0 enables Spread Spectrum, bit1 makes on-board SSD act as IDE slave. */
#if CONFIG_ONBOARD_IDE_SLAVE
#define SMC_CONFIG 0x03
@@ -118,7 +122,6 @@ static int smc_send_config(unsigned char config_data)
#include "cpu/amd/geode_lx/msrinit.c"
static const u16 sio_init_table[] = { // hi=data, lo=index
- 0x0707, // select LDN 7 (GPIO, SPI, watchdog, ...)
0x072C, // VIN6 enabled, FAN4/5 disabled, VIN7,VIN3 internal
0x1423, // don't delay PoWeROK1/2
0x9072, // watchdog triggers PWROK, counts seconds
@@ -140,13 +143,10 @@ static void mb_gpio_init(void)
int i;
/* Init Super I/O WDT, GPIOs. Done early, WDT init may trigger reset! */
- it8712f_enter_conf();
for (i = 0; i < ARRAY_SIZE(sio_init_table); i++) {
- u16 val = sio_init_table[i];
- outb((u8)val, SIO_INDEX);
- outb(val >> 8, SIO_DATA);
+ u16 reg = sio_init_table[i];
+ ite_reg_write(GPIO_DEV, (u8) reg, (reg >> 8));
}
- it8712f_exit_conf();
}
void main(unsigned long bist)
@@ -166,7 +166,7 @@ void main(unsigned long bist)
* Note: Must do this AFTER the early_setup! It is counting on some
* early MSR setup for CS5536.
*/
- it8712f_enable_serial(0, CONFIG_TTYS0_BASE); // Does not use its 1st parameter
+ ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
mb_gpio_init();
console_init();