summaryrefslogtreecommitdiff
path: root/src/mainboard/lippert/spacerunner-lx
diff options
context:
space:
mode:
authorWarren Turkal <wt@penguintechs.org>2010-09-27 21:18:26 +0000
committerStefan Reinauer <stepan@openbios.org>2010-09-27 21:18:26 +0000
commite0afe735a0fa0564a9ab082593c60f56c291493a (patch)
treeab01ea91c8cdcdec898cc50afd4954284d7f7eb0 /src/mainboard/lippert/spacerunner-lx
parent768d8ea09830a02fe815b8b60825430a3ec6a10a (diff)
downloadcoreboot-e0afe735a0fa0564a9ab082593c60f56c291493a.tar.xz
All these boards already had the CACHE_AS_RAM option in their individual
configs. I just moved it the the CPU that they all use. Signed-off-by: Warren Turkal <wt@penguintechs.org> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5871 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/lippert/spacerunner-lx')
-rw-r--r--src/mainboard/lippert/spacerunner-lx/Kconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/lippert/spacerunner-lx/Kconfig b/src/mainboard/lippert/spacerunner-lx/Kconfig
index 89a52ae1a6..7526d1ecb4 100644
--- a/src/mainboard/lippert/spacerunner-lx/Kconfig
+++ b/src/mainboard/lippert/spacerunner-lx/Kconfig
@@ -11,7 +11,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
- select CACHE_AS_RAM
# Board is equipped with a 1 MB SPI flash, however, due to limitations
# of the IT8712F Super I/O, only the top 512 KB are directly mapped.
select BOARD_ROMSIZE_KB_512