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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-03-04 07:48:42 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-01 03:12:42 +0000 |
| commit | c97b0607ff4883fc5ceab0da2c8687a91ece2d13 (patch) | |
| tree | bad670494bdb065686404df395f73d7157b4c41e /src/mainboard/lippert/toucan-af/OemCustomize.c | |
| parent | 5d883661ae5ed0835b27fb522674781237f3d33a (diff) | |
| download | coreboot-c97b0607ff4883fc5ceab0da2c8687a91ece2d13.tar.xz | |
lippert/toucan-af: Switch away from AGESA_LEGACY
NOTE: Some code was currently left behind that may be
required for certain type of board reboots. A followup
patch will address this.
Change-Id: I8fb89fb82c3a3608bb84b29319eb793605538996
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/19176
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/lippert/toucan-af/OemCustomize.c')
| -rw-r--r-- | src/mainboard/lippert/toucan-af/OemCustomize.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/lippert/toucan-af/OemCustomize.c b/src/mainboard/lippert/toucan-af/OemCustomize.c index a5f4921de2..0bb725e899 100644 --- a/src/mainboard/lippert/toucan-af/OemCustomize.c +++ b/src/mainboard/lippert/toucan-af/OemCustomize.c @@ -22,7 +22,7 @@ #include "Filecode.h" #include <string.h> -#include <northbridge/amd/agesa/agesawrapper.h> +#include <northbridge/amd/agesa/state_machine.h> #define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE @@ -42,7 +42,7 @@ **/ /*---------------------------------------------------------------------------------------*/ -static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly) +void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly) { AGESA_STATUS Status; VOID *BrazosPcieComplexListPtr; @@ -138,7 +138,6 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = { InitEarly->GnbConfig.PcieComplexList = BrazosPcieComplexListPtr; InitEarly->GnbConfig.PsppPolicy = 0; - return AGESA_SUCCESS; } /*---------------------------------------------------------------------------------------- @@ -152,13 +151,14 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = { * is populated, AGESA will base its settings on the data from the table. Otherwise, it will * use its default conservative settings. */ -CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { +static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = { HW_RXEN_SEED (ANY_SOCKET, ANY_CHANNEL, 0x3B, 0x3B, 0x3B, 0x3B, 0x3B, 0x3B, 0x3B, 0x3B, 0x3B), NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 2), NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 1), PSO_END }; -const struct OEM_HOOK OemCustomize = { - .InitEarly = OemInitEarly, -}; +void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost) +{ + InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)PlatformMemoryTable; +} |