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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-06-18 09:55:26 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-07-03 09:45:58 +0200
commit23b4f0c7344c199d5adb0aece8d3ca9a624f4a34 (patch)
treed0a6438659687131cc685fdc4af44a973cb7d3af /src/mainboard/lippert
parent31eff28f4f47a38f6e25c93d76f52fe19a092545 (diff)
downloadcoreboot-23b4f0c7344c199d5adb0aece8d3ca9a624f4a34.tar.xz
AGESA boards: Add prepare_for_resume()
Use one common implementation for all AGESA platforms. Change-Id: I410f8e0a9c75445882d67659cde00004eb7ad6b4 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6084 Tested-by: build bot (Jenkins) Reviewed-by: Dave Frodin <dave.frodin@se-eng.com> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/lippert')
-rw-r--r--src/mainboard/lippert/frontrunner-af/romstage.c26
-rw-r--r--src/mainboard/lippert/toucan-af/romstage.c26
2 files changed, 2 insertions, 50 deletions
diff --git a/src/mainboard/lippert/frontrunner-af/romstage.c b/src/mainboard/lippert/frontrunner-af/romstage.c
index 794588311e..06b365a0d2 100644
--- a/src/mainboard/lippert/frontrunner-af/romstage.c
+++ b/src/mainboard/lippert/frontrunner-af/romstage.c
@@ -49,10 +49,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
u32 val;
-#if CONFIG_HAVE_ACPI_RESUME
- void *resume_backup_memory;
-#endif
-
/*
* All cores: allow caching of flash chip code and data
* (there are no cache-as-ram reliability concerns with family 14h)
@@ -148,27 +144,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "passed.\n");
post_code(0x61);
- printk(BIOS_DEBUG, "Find resume memory location\n");
- resume_backup_memory = backup_resume();
-
- post_code(0x62);
- printk(BIOS_DEBUG, "Move CAR stack.\n");
- move_stack_high_mem();
- printk(BIOS_DEBUG, "stack moved to: 0x%x\n", (u32) (resume_backup_memory + HIGH_MEMORY_SAVE));
-
- post_code(0x63);
- disable_cache_as_ram();
- printk(BIOS_DEBUG, "CAR disabled.\n");
- set_resume_cache();
-
- /*
- * Copy the system memory that is in the ramstage area to the
- * reserved area.
- */
- if (resume_backup_memory)
- memcpy(resume_backup_memory, (void *)(CONFIG_RAMBASE), HIGH_MEMORY_SAVE);
-
- printk(BIOS_DEBUG, "System memory saved. OK to load ramstage.\n");
+ prepare_for_resume();
}
#endif
diff --git a/src/mainboard/lippert/toucan-af/romstage.c b/src/mainboard/lippert/toucan-af/romstage.c
index b8bd744522..6a5c580dcb 100644
--- a/src/mainboard/lippert/toucan-af/romstage.c
+++ b/src/mainboard/lippert/toucan-af/romstage.c
@@ -50,10 +50,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
u32 val;
-#if CONFIG_HAVE_ACPI_RESUME
- void *resume_backup_memory;
-#endif
-
/*
* All cores: allow caching of flash chip code and data
* (there are no cache-as-ram reliability concerns with family 14h)
@@ -149,27 +145,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "passed.\n");
post_code(0x61);
- printk(BIOS_DEBUG, "Find resume memory location\n");
- resume_backup_memory = backup_resume();
-
- post_code(0x62);
- printk(BIOS_DEBUG, "Move CAR stack.\n");
- move_stack_high_mem();
- printk(BIOS_DEBUG, "stack moved to: 0x%x\n", (u32) (resume_backup_memory + HIGH_MEMORY_SAVE));
-
- post_code(0x63);
- disable_cache_as_ram();
- printk(BIOS_DEBUG, "CAR disabled.\n");
- set_resume_cache();
-
- /*
- * Copy the system memory that is in the ramstage area to the
- * reserved area.
- */
- if (resume_backup_memory)
- memcpy(resume_backup_memory, (void *)(CONFIG_RAMBASE), HIGH_MEMORY_SAVE);
-
- printk(BIOS_DEBUG, "System memory saved. OK to load ramstage.\n");
+ prepare_for_resume();
}
#endif