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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-01 09:50:32 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-01 09:50:32 +0000 |
| commit | 0c781b2694b2c137d9761704954ea38be5ba8a15 (patch) | |
| tree | 55c8bb4ea9f5875da7e4f7ffa6b5e7d2aa87a4b8 /src/mainboard/lippert | |
| parent | 84b685af5f1e1cf49c2c2f22ae80a8a0df8472f8 (diff) | |
| download | coreboot-0c781b2694b2c137d9761704954ea38be5ba8a15.tar.xz | |
-Â get rid of ASM_CONSOLE_LOGLEVEL except in two assembler files.
- start naming all versions of post code output "post_code()"
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5344 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/lippert')
| -rw-r--r-- | src/mainboard/lippert/roadrunner-lx/romstage.c | 4 | ||||
| -rw-r--r-- | src/mainboard/lippert/spacerunner-lx/romstage.c | 4 |
2 files changed, 2 insertions, 6 deletions
diff --git a/src/mainboard/lippert/roadrunner-lx/romstage.c b/src/mainboard/lippert/roadrunner-lx/romstage.c index 67f4c3c381..efaf1dd6be 100644 --- a/src/mainboard/lippert/roadrunner-lx/romstage.c +++ b/src/mainboard/lippert/roadrunner-lx/romstage.c @@ -36,8 +36,6 @@ #include <cpu/amd/geode_post_code.h> #include "southbridge/amd/cs5536/cs5536.h" -#define POST_CODE(x) outb(x, 0x80) - #include "southbridge/amd/cs5536/cs5536_early_smbus.c" #include "southbridge/amd/cs5536/cs5536_early_setup.c" #include "superio/ite/it8712f/it8712f_early_serial.c" @@ -132,7 +130,7 @@ static void mb_gpio_init(void) void cache_as_ram_main(void) { - POST_CODE(0x01); + post_code(0x01); static const struct mem_controller memctrl[] = { {.channel0 = {(0xa << 3) | 0, (0xa << 3) | 1}} diff --git a/src/mainboard/lippert/spacerunner-lx/romstage.c b/src/mainboard/lippert/spacerunner-lx/romstage.c index 344e0eed84..51b1cf6d1d 100644 --- a/src/mainboard/lippert/spacerunner-lx/romstage.c +++ b/src/mainboard/lippert/spacerunner-lx/romstage.c @@ -37,8 +37,6 @@ #include <cpu/amd/geode_post_code.h> #include "southbridge/amd/cs5536/cs5536.h" -#define POST_CODE(x) outb(x, 0x80) - #include "southbridge/amd/cs5536/cs5536_early_smbus.c" #include "southbridge/amd/cs5536/cs5536_early_setup.c" #include "superio/ite/it8712f/it8712f_early_serial.c" @@ -194,7 +192,7 @@ static void mb_gpio_init(void) void cache_as_ram_main(void) { int err; - POST_CODE(0x01); + post_code(0x01); static const struct mem_controller memctrl[] = { {.channel0 = {(0xa << 3) | 0, (0xa << 3) | 1}} |