newconfig is no more.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 0 insertions, 246 deletions

diff --git a/src/mainboard/mitac/6513wu/Config.lb b/src/mainboard/mitac/6513wu/Config.lb
deleted file mode 100644
index a6480bd585..0000000000
--- a/src/mainboard/mitac/6513wu/Config.lb
+++ /dev/null
@@ -1,138 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Michael Gold <mgold@ncf.ca>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
-##
-
-## CONFIG_XIP_ROM_SIZE must be a power of 2.
-default CONFIG_XIP_ROM_SIZE = 64 * 1024
-include /config/nofailovercalculation.lb
-
-arch i386 end
-driver mainboard.o
-if CONFIG_GENERATE_PIRQ_TABLE
-	object irq_tables.o
-end
-makerule ./failover.E
-	depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
-	action "../romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
-end
-makerule ./failover.inc
-	depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
-	action "../romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
-end
-makerule ./auto.E
-	# depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc"
-	depends "$(CONFIG_MAINBOARD)/auto.c ../romcc"
-	# Note: The -mcpu=p2 is important, or else... 'too few registers'.
-	action "../romcc -mcpu=p2 -E -O -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@"
-end
-makerule ./auto.inc
-	# depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc"
-	depends "$(CONFIG_MAINBOARD)/auto.c ../romcc"
-	# Note: The -mcpu=p2 is important, or else... 'too few registers'.
-	action "../romcc -mcpu=p2 -O -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@"
-end
-mainboardinit cpu/x86/16bit/entry16.inc
-mainboardinit cpu/x86/32bit/entry32.inc
-ldscript /cpu/x86/16bit/entry16.lds
-ldscript /cpu/x86/32bit/entry32.lds
-if CONFIG_USE_FALLBACK_IMAGE
-	mainboardinit cpu/x86/16bit/reset16.inc
-	ldscript /cpu/x86/16bit/reset16.lds
-else
-	mainboardinit cpu/x86/32bit/reset32.inc
-	ldscript /cpu/x86/32bit/reset32.lds
-end
-mainboardinit arch/i386/lib/cpu_reset.inc
-mainboardinit arch/i386/lib/id.inc
-ldscript /arch/i386/lib/id.lds
-if CONFIG_USE_FALLBACK_IMAGE
-	ldscript /arch/i386/lib/failover.lds
-	mainboardinit ./failover.inc
-end
-mainboardinit cpu/x86/fpu_enable.inc
-mainboardinit ./auto.inc
-mainboardinit cpu/x86/mmx_disable.inc
-
-dir /pc80
-config chip.h
-
-chip northbridge/intel/i82810           # Northbridge
-  device apic_cluster 0 on              # APIC cluster
-    chip cpu/intel/socket_PGA370        # CPU
-      device apic 0 on end              # APIC
-    end
-  end
-  device pci_domain 0 on                # PCI domain
-    device pci 0.0 on end               # Graphics Memory Controller Hub (GMCH)
-    device pci 1.0 on end
-    chip southbridge/intel/i82801xx     # Southbridge
-      register "pirqa_routing" = "0x03"
-      register "pirqb_routing" = "0x05"
-      register "pirqc_routing" = "0x09"
-      register "pirqd_routing" = "0x0b"
-
-      register "ide0_enable" = "1"
-      register "ide1_enable" = "1"
-
-      device pci 1e.0 on                # PCI bridge
-        device pci 5.0 on end           # Audio controller (ESS ES1988)
-      end
-      device pci 1f.0 on                # ISA bridge
-        chip superio/smsc/smscsuperio   # Super I/O (SMSC LPC47U332)
-          device pnp 4e.0 on            # Floppy
-            io 0x60 = 0x3f0
-            irq 0x70 = 6
-            drq 0x74 = 2
-          end
-          device pnp 4e.3 on            # Parallel port
-            io 0x60 = 0x378
-            irq 0x70 = 7
-            drq 0x74 = 3
-          end
-          device pnp 4e.4 on            # COM1
-            io 0x60 = 0x3f8
-            irq 0x70 = 4
-          end
-          device pnp 4e.5 on            # MIDI port (MPU-401)
-            io 0x60 = 0x330
-            irq 0x70 = 10
-          end
-          device pnp 4e.7 on            # PS/2 keyboard / mouse
-            io 0x60 = 0x60              # XXX: not relocatable
-            io 0x62 = 0x64              # XXX: not relocatable
-            irq 0x70 = 1                # PS/2 keyboard interrupt
-            irq 0x72 = 12               # PS/2 mouse interrupt
-          end
-          device pnp 4e.9 on            # Game port
-            io 0x60 = 0x201
-          end
-          device pnp 4e.a on            # Runtime registers
-            io 0x60 = 0x400
-          end
-          device pnp 4e.b off end       # SMBus
-        end
-      end
-      device pci 1f.1 on end            # IDE
-      device pci 1f.2 on end            # USB
-      device pci 1f.3 on end            # SMbus
-      device pci 1f.5 off end           # Audio controller
-      device pci 1f.6 off end           # Modem
-    end
-  end
-end
diff --git a/src/mainboard/mitac/6513wu/Options.lb b/src/mainboard/mitac/6513wu/Options.lb
deleted file mode 100644
index 0dac44bb03..0000000000
--- a/src/mainboard/mitac/6513wu/Options.lb
+++ /dev/null
@@ -1,108 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Michael Gold <mgold@ncf.ca>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
-##
-
-uses CC
-uses CONFIG_COMPRESSED_PAYLOAD_LZMA
-uses CONFIG_CONSOLE_SERIAL8250
-uses CONFIG_CONSOLE_VGA
-uses CONFIG_CROSS_COMPILE
-uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
-uses CONFIG_FALLBACK_SIZE
-uses CONFIG_HAVE_FALLBACK_BOOT
-uses CONFIG_HAVE_HARD_RESET
-uses CONFIG_GENERATE_MP_TABLE
-uses CONFIG_HAVE_OPTION_TABLE
-uses CONFIG_GENERATE_PIRQ_TABLE
-uses CONFIG_HEAP_SIZE
-uses CONFIG_IRQ_SLOT_COUNT
-uses CONFIG_MAINBOARD
-uses CONFIG_MAINBOARD_PART_NUMBER
-uses CONFIG_MAINBOARD_VENDOR
-uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
-uses CONFIG_OBJCOPY
-uses CONFIG_PCI_ROM_RUN
-uses CONFIG_RAMBASE
-uses CONFIG_ROMBASE
-uses CONFIG_ROM_IMAGE_SIZE
-uses CONFIG_ROM_PAYLOAD
-uses CONFIG_ROM_SECTION_OFFSET
-uses CONFIG_ROM_SECTION_SIZE
-uses CONFIG_ROM_SIZE
-uses CONFIG_STACK_SIZE
-uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
-uses CONFIG_TTYS0_BASE
-uses CONFIG_TTYS0_BAUD
-uses CONFIG_TTYS0_LCS
-uses CONFIG_UDELAY_TSC
-uses CONFIG_USE_FALLBACK_IMAGE
-uses CONFIG_USE_INIT
-uses CONFIG_USE_OPTION_TABLE
-uses CONFIG_VIDEO_MB
-uses CONFIG_XIP_ROM_BASE
-uses CONFIG_XIP_ROM_SIZE
-uses COREBOOT_EXTRA_VERSION
-uses HOSTCC
-
-# Motherboard info, tables, etc.
-default CONFIG_MAINBOARD_VENDOR = "Mitac"
-default CONFIG_MAINBOARD_PART_NUMBER = "6513WU"
-default CONFIG_IRQ_SLOT_COUNT = 8
-default CONFIG_GENERATE_PIRQ_TABLE = 1
-default CONFIG_GENERATE_MP_TABLE = 0
-default CONFIG_HAVE_OPTION_TABLE = 0
-default CONFIG_USE_OPTION_TABLE = 0
-
-# ROM layout
-default CONFIG_ROM_SIZE = 512 * 1024
-default CONFIG_ROM_IMAGE_SIZE = 128 * 1024
-default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
-default CONFIG_HAVE_FALLBACK_BOOT = 1
-default CONFIG_ROM_PAYLOAD = 1
-
-# RAM layout
-default CONFIG_RAMBASE = 0x00004000
-default CONFIG_STACK_SIZE = 8 * 1024
-default CONFIG_HEAP_SIZE = 16 * 1024
-
-# Misc. settings
-default CONFIG_USE_INIT = 0
-default CONFIG_HAVE_HARD_RESET = 0
-default CONFIG_UDELAY_TSC = 1
-default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
-
-# Compiler setup
-default CONFIG_CROSS_COMPILE = ""
-default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32"
-default HOSTCC = "gcc"
-
-# Console settings
-default CONFIG_CONSOLE_SERIAL8250 = 1
-default CONFIG_TTYS0_BAUD = 115200
-default CONFIG_TTYS0_BASE = 0x3f8
-default CONFIG_TTYS0_LCS = 0x3     # 8n1
-default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7  # No debugging/spew
-default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
-
-# Enable onboard video
-default CONFIG_CONSOLE_VGA = 1
-default CONFIG_PCI_ROM_RUN = 1
-default CONFIG_VIDEO_MB = 1
-
-end