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| author | Ronald G. Minnich <rminnich@gmail.com> | 2005-10-19 18:19:26 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2005-10-19 18:19:26 +0000 |
| commit | 2f084d4904c26ef0cd87ecd46b83a8fef3871290 (patch) | |
| tree | eca4c1ca5a96c4995f8f6ce1914a79e9b93083a2 /src/mainboard/momentum/apache/Config.lb | |
| parent | 7d30f2e754e5f102dbd20de96bbbea028de28f37 (diff) | |
| download | coreboot-2f084d4904c26ef0cd87ecd46b83a8fef3871290.tar.xz | |
initial support for apache.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2059 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/momentum/apache/Config.lb')
| -rw-r--r-- | src/mainboard/momentum/apache/Config.lb | 107 |
1 files changed, 107 insertions, 0 deletions
diff --git a/src/mainboard/momentum/apache/Config.lb b/src/mainboard/momentum/apache/Config.lb new file mode 100644 index 0000000000..45d41dda38 --- /dev/null +++ b/src/mainboard/momentum/apache/Config.lb @@ -0,0 +1,107 @@ +## +## Config file for the momentum apache +## + +## +## Early board initialization, called from ppc_main() +## +#initobject init.c + +arch ppc end + +chip northbridge/ibm/cpc925 + device pci_domain 0 on + device pci 00.0 on end + device pci 00.1 on end + device pci 01.0 on end + device pci 02.0 on + chip southbridge/intel/pxhd # pxhd1 + device pci 00.0 on end + device pci 00.1 on end + device pci 00.2 on + chip drivers/generic/generic + device pci 04.0 on end + device pci 04.1 on end + end + end + device pci 00.3 on end + end + end + device pci 06.0 on end + chip southbridge/intel/ich5r # ich5r + device pci 1d.0 on end + device pci 1d.1 on end + device pci 1d.2 on end + device pci 1d.3 off end + device pci 1d.7 on end + device pci 1e.0 on + chip drivers/ati/ragexl + device pci 0c.0 on end + end + end + device pci 1f.0 on + chip superio/NSC/pc87427 + device pnp 2e.0 off end + device pnp 2e.2 on +# io 0x60 = 0x2f8 +# irq 0x70 = 3 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.3 on +# io 0x60 = 0x3f8 +# irq 0x70 = 4 + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 2e.4 off end + device pnp 2e.5 off end + device pnp 2e.6 on + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 + end + device pnp 2e.7 off end + device pnp 2e.9 off end + device pnp 2e.a off end + device pnp 2e.f on end + device pnp 2e.10 off end + device pnp 2e.14 off end + end + end + device pci 1f.1 on end + device pci 1f.2 off end + device pci 1f.3 on end + device pci 1f.5 off end + device pci 1f.6 off end + register "gpio[40]" = "ICH5R_GPIO_USE_AS_GPIO" + register "gpio[48]" = "ICH5R_GPIO_USE_AS_GPIO | ICH5R_GPIO_SEL_OUTPUT | ICH5R_GPIO_LVL_LOW" + register "gpio[41]" = "ICH5R_GPIO_USE_AS_GPIO | ICH5R_GPIO_SEL_INPUT" + end + end + device apic_cluster 0 on + chip cpu/ppc/ppc970 # cpu 0 + end + chip cpu/ppc/ppc970 # cpu 1 + end + end +end + + +chip cpu/ppc/ppc4xx + device pci_domain 0 on + device pci 0.0 on end + chip southbridge/winbond/w83c553 + device pci 9.0 on end # ISA bridge + device pci 9.1 on end # IDE contoller + end + device pci e.0 on end + end +end + +## +## Build the objects we have code for in this directory. +## + +addaction linuxbios.a "$(CROSS_COMPILE)ranlib linuxbios.a" +makedefine CFLAGS += -msoft-float |