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authorGreg Watson <jarrah@users.sourceforge.net>2003-11-09 23:11:34 +0000
committerGreg Watson <jarrah@users.sourceforge.net>2003-11-09 23:11:34 +0000
commit91deab98a9adea9a4f2251ba73f46ca86f2acdaa (patch)
treea568857e10c756a52e3ec1c38220843ca7f71c19 /src/mainboard/motorola
parent54d4e651635c17979f27a615b18ba3550a91e7ea (diff)
downloadcoreboot-91deab98a9adea9a4f2251ba73f46ca86f2acdaa.tar.xz
*** empty log message ***
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1270 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/motorola')
-rw-r--r--src/mainboard/motorola/sandpoint/init.c63
1 files changed, 63 insertions, 0 deletions
diff --git a/src/mainboard/motorola/sandpoint/init.c b/src/mainboard/motorola/sandpoint/init.c
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index 0000000000..3bfdb5c2a6
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+++ b/src/mainboard/motorola/sandpoint/init.c
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2003, Greg Watson <gwatson@lanl.gov>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Do very early board initialization:
+ *
+ * - Configure External Bus (EBC)
+ * - Setup Flash
+ * - Setup NVRTC
+ * - Setup Board Control and Status Registers (BCSR)
+ * - Enable UART0 for debugging
+ */
+
+#include <ppc_asm.tmpl>
+#include <ppc.h>
+#include <arch/io.h>
+
+void pnp_output(char address, char data)
+{
+ outb(address, PNP_CFGADDR);
+ outb(data, PNP_CFGDATA);
+}
+
+void
+board_init(void)
+{
+ /*
+ * Configure FLASH
+ */
+
+ /*
+ * Configure NVTRC/BCSR
+ */
+
+ /*
+ * Enable UART0
+ */
+ pnp_output(0x07, 6); /* LD 6 = UART0 */
+ pnp_output(0x30, 0); /* Dectivate */
+ pnp_output(0x60, TTYS0_BASE >> 8); /* IO Base */
+ pnp_output(0x61, TTYS0_BASE & 0xFF); /* IO Base */
+ pnp_output(0x30, 1); /* Activate */
+ uart8250_init(UART0_IO_BASE, 115200/TTYS0_BAUD, TTYS0_LCS);
+}