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authorGreg Watson <jarrah@users.sourceforge.net>2004-01-22 00:01:20 +0000
committerGreg Watson <jarrah@users.sourceforge.net>2004-01-22 00:01:20 +0000
commit6cc2a5c4c420c7a520e5c173bb57bce2d817e665 (patch)
tree669527ee1c2e1237c61d16e23266a1b55beb7aa7 /src/mainboard/motorola
parent063f3d9395fde6b7fafe22d82e0d3b1be51694f9 (diff)
downloadcoreboot-6cc2a5c4c420c7a520e5c173bb57bce2d817e665.tar.xz
init.c
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1344 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/motorola')
-rw-r--r--src/mainboard/motorola/sandpoint/Config.lb12
1 files changed, 9 insertions, 3 deletions
diff --git a/src/mainboard/motorola/sandpoint/Config.lb b/src/mainboard/motorola/sandpoint/Config.lb
index 53bc6a4c0e..428f3d2584 100644
--- a/src/mainboard/motorola/sandpoint/Config.lb
+++ b/src/mainboard/motorola/sandpoint/Config.lb
@@ -7,18 +7,24 @@ uses CONFIG_SANDPOINT_TALUS
uses CONFIG_SANDPOINT_UNITY
uses CONFIG_SANDPOINT_VALIS
uses CONFIG_SANDPOINT_GYRUS
+uses ISA_IO_BASE
+uses MEM_IO_BASE
uses PCIC0_CFGADDR
uses PCIC0_CFGDATA
uses PNP_CFGADDR
uses PNP_CFGDATA
+uses _IO_BASE
##
-## Set PCI registers
+## Set memory map
##
+default ISA_IO_BASE=0xfe000000
+default MEM_IO_BASE=0xfd000000
default PCIC0_CFGADDR=0xfec00000
default PCIC0_CFGDATA=0xfee00000
-default PNP_CFGADDR=0xfe00015c
-default PNP_CFGDATA=0xfe00015d
+default PNP_CFGADDR=0x15c
+default PNP_CFGDATA=0x15d
+default _IO_BASE=ISA_IO_BASE
##
## Early board initialization, called from ppc_main()