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| author | Joseph Smith <joe@settoplinux.org> | 2009-05-29 13:45:22 +0000 |
|---|---|---|
| committer | Joseph Smith <joe@smittys.pointclark.net> | 2009-05-29 13:45:22 +0000 |
| commit | 60f0f1b18f87332a569ced6c8744a1572517ba39 (patch) | |
| tree | 8a278fad3d544363b676e11800e38365a71b2b11 /src/mainboard/msi/ms6178/Config.lb | |
| parent | f8a5c6ec02f1e21d62756bda07f755b3a2f4865f (diff) | |
| download | coreboot-60f0f1b18f87332a569ced6c8744a1572517ba39.tar.xz | |
enable/disable IDE 0/1 (Primary/Secondary) interfaces on the i82801xx southbridge.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4324 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/msi/ms6178/Config.lb')
| -rw-r--r-- | src/mainboard/msi/ms6178/Config.lb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/msi/ms6178/Config.lb b/src/mainboard/msi/ms6178/Config.lb index bfaf8f6f43..773d813922 100644 --- a/src/mainboard/msi/ms6178/Config.lb +++ b/src/mainboard/msi/ms6178/Config.lb @@ -82,6 +82,9 @@ chip northbridge/intel/i82810 # Northbridge # end end chip southbridge/intel/i82801xx # Southbridge + register "ide0_enable" = "1" + register "ide1_enable" = "1" + device pci 1e.0 on end # PCI bridge device pci 1f.0 on # ISA/LPC bridge chip superio/winbond/w83627hf # Super I/O |