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authorJonathan A. Kollasch <jakllsch@kollasch.net>2015-06-23 10:00:41 -0500
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-06-29 18:28:59 +0200
commit619781493a5dcd0ec027c6fe09d26b7cd49a907f (patch)
tree79fdfb0c0e4f45df4b1a8284cfb16de46366debc /src/mainboard/msi/ms7135/dsdt.asl
parent7a75aff3fff0d7e5c54041c2430c3396307a0651 (diff)
downloadcoreboot-619781493a5dcd0ec027c6fe09d26b7cd49a907f.tar.xz
mainboard/msi/ms7135: DSDT: fix PCI and AGR interrupts
Tested with interrupting AGP card in AGR slot. PCI slots tested with 3-function OHCI/EHCI USB 2.0 card, covering the INTA-INTC lines in each. Change-Id: I0f8aeba90890a76a7cf9cbee9be7bcf919d1e39a Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/10644 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/msi/ms7135/dsdt.asl')
-rw-r--r--src/mainboard/msi/ms7135/dsdt.asl34
1 files changed, 24 insertions, 10 deletions
diff --git a/src/mainboard/msi/ms7135/dsdt.asl b/src/mainboard/msi/ms7135/dsdt.asl
index 4dbbd3d9bd..eba0ffd30f 100644
--- a/src/mainboard/msi/ms7135/dsdt.asl
+++ b/src/mainboard/msi/ms7135/dsdt.asl
@@ -102,11 +102,6 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "CB-DSDT ", 1)
Package (0x04) { 0x0007FFFF, 0x00, \_SB.PCI0.LSA0, 0x00 },
Package (0x04) { 0x0008FFFF, 0x00, \_SB.PCI0.LSA1, 0x00 },
- Package (0x04) { 0x0009FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },
- Package (0x04) { 0x0009FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
- Package (0x04) { 0x0009FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
- Package (0x04) { 0x0009FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 },
-
Package (0x04) { 0x000AFFFF, 0x00, \_SB.PCI0.LEMA, 0x00 },
Package (0x04) { 0x000BFFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },
@@ -135,11 +130,30 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "CB-DSDT ", 1)
Name (_ADR, 0x00090000)
Name (_UID, 0x00)
Name (_PRT, Package () {
- /* AGR slot */
- Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 },
- Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x10 },
- Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x10 },
- Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x10 },
+ /* AGR slot "AGP1" */
+ Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },
+ Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 },
+ Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 },
+ Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 },
+
+ /* PCI slot "PCI1" */
+ Package (0x04) { 0x0007FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 },
+ Package (0x04) { 0x0007FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 },
+ Package (0x04) { 0x0007FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 },
+ /* Not sure INTD is right, but this is what the OEM BIOS does. */
+ Package (0x04) { 0x0007FFFF, 0x03, \_SB.PCI0.LNKE, 0x00 },
+
+ /* PCI slot "PCI2" */
+ Package (0x04) { 0x0008FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 },
+ Package (0x04) { 0x0008FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 },
+ Package (0x04) { 0x0008FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 },
+ Package (0x04) { 0x0008FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 },
+
+ /* PCI slot "PCI3" */
+ Package (0x04) { 0x0009FFFF, 0x00, \_SB.PCI0.LNKD, 0x00 },
+ Package (0x04) { 0x0009FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 },
+ Package (0x04) { 0x0009FFFF, 0x02, \_SB.PCI0.LNKB, 0x00 },
+ Package (0x04) { 0x0009FFFF, 0x03, \_SB.PCI0.LNKC, 0x00 },
})
}