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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-21 17:29:59 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-21 17:29:59 +0000 |
| commit | 57b2ff886e0ce2c92820f5722c8031def3ac94cf (patch) | |
| tree | 3bf95eb33cd3de0b8f2bae495b3ae1453601c4d3 /src/mainboard/msi/ms7135 | |
| parent | 5244e1ba63e5f3ea12066734bfb0d864a8f1f11d (diff) | |
| download | coreboot-57b2ff886e0ce2c92820f5722c8031def3ac94cf.tar.xz | |
Drop excessive whitespace randomly sprinkled in romstage.c files.
Also drop some dead or useless code snippets.
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6107 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/msi/ms7135')
| -rw-r--r-- | src/mainboard/msi/ms7135/romstage.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c index ca31857382..74e966d148 100644 --- a/src/mainboard/msi/ms7135/romstage.c +++ b/src/mainboard/msi/ms7135/romstage.c @@ -22,8 +22,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define SERIAL_DEV PNP_DEV(0x4e, W83627THG_SP1) - #include <stdint.h> #include <string.h> #include <device/pci_def.h> @@ -35,7 +33,6 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "superio/winbond/w83627thg/w83627thg_early_serial.c" - #include <cpu/amd/model_fxx_rev.h> #include <console/console.h> #include "northbridge/amd/amdk8/incoherent_ht.c" @@ -51,6 +48,8 @@ #include "cpu/amd/dualcore/dualcore.c" #include <spd.h> +#define SERIAL_DEV PNP_DEV(0x4e, W83627THG_SP1) + static void memreset(int controllers, const struct mem_controller *ctrl) { /* FIXME: Nothing to do? */ @@ -70,10 +69,8 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" #include "southbridge/nvidia/ck804/ck804_early_setup_ss.h" #include "southbridge/nvidia/ck804/ck804_early_setup_car.c" - #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" - #include "northbridge/amd/amdk8/early_ht.c" static void sio_setup(void) @@ -171,4 +168,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_cache_as_ram(); } - |