summaryrefslogtreecommitdiff
path: root/src/mainboard/msi/ms7135
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coresystems.de>2010-03-31 14:34:40 +0000
committerStefan Reinauer <stepan@openbios.org>2010-03-31 14:34:40 +0000
commit5a1f5970857a5ad1fda0cf9d5945192408bf537b (patch)
treeb81a16a564c29788dcb6c306ea27855703d230de /src/mainboard/msi/ms7135
parentb8ac05d187c6cc4e777c96d39e075c5d97d93ffc (diff)
downloadcoreboot-5a1f5970857a5ad1fda0cf9d5945192408bf537b.tar.xz
This patch drops arch/i386/lib/console.c and arch/i386/lib/console_print.c and
makes include/console/console.h and console/console.c usable both in __PRE_RAM__ and coreboot_ram stages. While debugging this, I removed an indirection from the e7520 ram init code (same as we did on a couple of other chipsets, removes some register pressure from romcc) Also, drop remainders of CONFIG_USE_INIT (except the one odd piece of dead code in cache_as_ram.inc) Then some ap_romstage.c fixes, at least the nvidia/l1_2pvv compiled for me with CONFIG_AP_CODE_IN_CAR set in Kconfig which it did not before. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5341 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/msi/ms7135')
-rw-r--r--src/mainboard/msi/ms7135/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c
index 80f217c363..2a6c6f368b 100644
--- a/src/mainboard/msi/ms7135/romstage.c
+++ b/src/mainboard/msi/ms7135/romstage.c
@@ -51,7 +51,7 @@
#include <cpu/amd/model_fxx_rev.h>
#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
#include "lib/ramtest.c"
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "southbridge/nvidia/ck804/ck804_early_smbus.c"