diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-15 12:39:29 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-15 12:39:29 +0000 |
| commit | 23836e2345282151b0b46de6cdcd2bb2faee87f6 (patch) | |
| tree | e1e416ae11a78b455a26f378f33d0a8db6fa69af /src/mainboard/msi/ms9185 | |
| parent | c30a6e859e20dbadbad006f2f93068e7f9c36043 (diff) | |
| download | coreboot-23836e2345282151b0b46de6cdcd2bb2faee87f6.tar.xz | |
zero warnings days...
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5442 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/msi/ms9185')
| -rw-r--r-- | src/mainboard/msi/ms9185/romstage.c | 14 |
1 files changed, 1 insertions, 13 deletions
diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c index 10135a5c50..bd1c4a1189 100644 --- a/src/mainboard/msi/ms9185/romstage.c +++ b/src/mainboard/msi/ms9185/romstage.c @@ -71,9 +71,6 @@ #define SERIAL_DEV PNP_DEV(0x2e, PC87417_SP1) #define RTC_DEV PNP_DEV(0x2e, PC87417_RTC) #include "southbridge/broadcom/bcm5785/bcm5785_early_setup.c" -static void memreset_setup(void) -{ -} static void memreset(int controllers, const struct mem_controller *ctrl) { @@ -104,12 +101,9 @@ static inline int spd_read_byte(unsigned device, unsigned address) } #include "northbridge/amd/amdk8/amdk8_f.h" -#include "northbridge/amd/amdk8/coherent_ht.c" - #include "northbridge/amd/amdk8/incoherent_ht.c" - +#include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" - #include "lib/generic_sdram.c" /* msi does not want the default */ @@ -129,7 +123,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #define DIMM6 0x56 #define DIMM7 0x57 - #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" @@ -144,12 +137,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) //first node RC0|DIMM0, RC0|DIMM2, RC0|DIMM4, RC0|DIMM6, RC0|DIMM1, RC0|DIMM3, RC0|DIMM5, RC0|DIMM7, -#if CONFIG_MAX_PHYSICAL_CPUS > 1 //second node RC1|DIMM0, RC1|DIMM2, RC1|DIMM4, RC1|DIMM6, RC1|DIMM1, RC1|DIMM3, RC1|DIMM5, RC1|DIMM7, -#endif - }; struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + @@ -278,8 +268,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif - memreset_setup(); - //do we need apci timer, tsc...., only debug need it for better output /* all ap stopped? */ // init_timer(); // Need to use TMICT to synconize FID/VID |