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authorStefan Reinauer <stepan@coresystems.de>2010-04-25 18:06:32 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-25 18:06:32 +0000
commitbcb8c97af94c9fc814fdbdafe5361666bf81d442 (patch)
treed3a121678b32d7436787975292432c4975bb9f6d /src/mainboard/msi/ms9282
parent14b62da01ded297e12db6ed3b41778202e9aae41 (diff)
downloadcoreboot-bcb8c97af94c9fc814fdbdafe5361666bf81d442.tar.xz
try to unify timing initialization across those boards that need it...
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5496 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/msi/ms9282')
-rw-r--r--src/mainboard/msi/ms9282/romstage.c17
1 files changed, 8 insertions, 9 deletions
diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c
index 87517f078c..ee44ea2ad3 100644
--- a/src/mainboard/msi/ms9282/romstage.c
+++ b/src/mainboard/msi/ms9282/romstage.c
@@ -199,16 +199,16 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
#endif
ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
- needs_reset = optimize_link_coherent_ht();
+ init_timer(); /* Need to use TMICT to synconize FID/VID. */
- needs_reset |= optimize_link_incoherent_ht(sysinfo);
+ needs_reset = optimize_link_coherent_ht();
+ needs_reset |= optimize_link_incoherent_ht(sysinfo);
+ needs_reset |= mcp55_early_setup_x();
- needs_reset |= mcp55_early_setup_x();
-
- if (needs_reset) {
- print_info("ht reset -\n");
- soft_reset();
- }
+ if (needs_reset) {
+ print_info("ht reset -\n");
+ soft_reset();
+ }
//It's the time to set ctrl now;
fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
@@ -226,6 +226,5 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
post_cache_as_ram();
-
}