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authorElyes HAOUAS <ehaouas@noos.fr>2014-07-23 10:04:37 +0200
committerPatrick Georgi <patrick@georgi-clan.de>2014-07-24 12:42:59 +0200
commit643646075019816c6ae441f613426caaf7b0bd2e (patch)
tree9e7e1a598b55a6f46407ce8035278fcdef1d25bc /src/mainboard/msi
parent5662311b69fc59b2a979f79b39d844e9d3947e14 (diff)
downloadcoreboot-643646075019816c6ae441f613426caaf7b0bd2e.tar.xz
mainboard/msi/ms7135/devicetree.cb: Remove trailing whitespace
Change-Id: I4151e8ac8903d0daa1e7b12ecadbab8ff7adaaeb Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6349 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/msi')
-rw-r--r--src/mainboard/msi/ms7135/devicetree.cb144
1 files changed, 72 insertions, 72 deletions
diff --git a/src/mainboard/msi/ms7135/devicetree.cb b/src/mainboard/msi/ms7135/devicetree.cb
index a0c39b4194..e3f0c8c98a 100644
--- a/src/mainboard/msi/ms7135/devicetree.cb
+++ b/src/mainboard/msi/ms7135/devicetree.cb
@@ -1,75 +1,75 @@
chip northbridge/amd/amdk8/root_complex # Root complex
- device cpu_cluster 0 on # (L)APIC cluster
- chip cpu/amd/socket_754 # CPU socket
- device lapic 0 on end # Local APIC of the CPU
- end
- end
+ device cpu_cluster 0 on # (L)APIC cluster
+ chip cpu/amd/socket_754 # CPU socket
+ device lapic 0 on end # Local APIC of the CPU
+ end
+ end
- device domain 0 on # PCI domain
- subsystemid 0x1462 0x7135 inherit
- chip northbridge/amd/amdk8 # Northbridge / RAM controller
- device pci 18.0 on # Link 0 == LDT 0
- chip southbridge/nvidia/ck804 # Southbridge
- device pci 0.0 on end # HT
- device pci 1.0 on # LPC
- chip superio/winbond/w83627thg # Super I/O
- device pnp 4e.0 on # Floppy
- io 0x60 = 0x3f0
- irq 0x70 = 6
- drq 0x74 = 2
- end
- device pnp 4e.1 on # Parallel port
- io 0x60 = 0x378
- irq 0x70 = 7
- drq 0x74 = 3
- end
- device pnp 4e.2 on # Com1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 4e.3 on # Com2
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 4e.5 on # PS/2 keyboard & mouse
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1
- irq 0x72 = 12
- end
- device pnp 4e.7 off end # Game port, MIDI, GPIO 1 & 5
- device pnp 4e.8 off end # GPIO 2
- device pnp 4e.9 off end # GPIO 3, GPIO 4
- device pnp 4e.a off end # ACPI
- device pnp 4e.b on # Hardware monitor
- io 0x60 = 0x290
- irq 0x70 = 5
- end
- end
- end
- device pci 1.1 on end # SMbus
- device pci 2.0 on end # USB 1.1
- device pci 2.1 on end # USB 2
- device pci 4.0 on end # Onboard audio (ACI)
- device pci 4.1 off end # Onboard modem (MCI), N/A
- device pci 6.0 on end # IDE
- device pci 7.0 on end # SATA 1
- device pci 8.0 on end # SATA 0
- device pci 9.0 on end # PCI
- device pci a.0 on end # NIC
- device pci b.0 off end # PCI E 3 (N/A)
- device pci c.0 off end # PCI E 2 (N/A)
- device pci d.0 on end # PCI E 1
- device pci e.0 on end # PCI E 0
- register "ide0_enable" = "1"
- register "ide1_enable" = "1"
- register "sata0_enable" = "1"
- register "sata1_enable" = "1"
- end
- end
- device pci 18.1 on end
- device pci 18.2 on end
- device pci 18.3 on end
- end
- end
+ device domain 0 on # PCI domain
+ subsystemid 0x1462 0x7135 inherit
+ chip northbridge/amd/amdk8 # Northbridge / RAM controller
+ device pci 18.0 on # Link 0 == LDT 0
+ chip southbridge/nvidia/ck804 # Southbridge
+ device pci 0.0 on end # HT
+ device pci 1.0 on # LPC
+ chip superio/winbond/w83627thg # Super I/O
+ device pnp 4e.0 on # Floppy
+ io 0x60 = 0x3f0
+ irq 0x70 = 6
+ drq 0x74 = 2
+ end
+ device pnp 4e.1 on # Parallel port
+ io 0x60 = 0x378
+ irq 0x70 = 7
+ drq 0x74 = 3
+ end
+ device pnp 4e.2 on # Com1
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ device pnp 4e.3 on # Com2
+ io 0x60 = 0x2f8
+ irq 0x70 = 3
+ end
+ device pnp 4e.5 on # PS/2 keyboard & mouse
+ io 0x60 = 0x60
+ io 0x62 = 0x64
+ irq 0x70 = 1
+ irq 0x72 = 12
+ end
+ device pnp 4e.7 off end # Game port, MIDI, GPIO 1 & 5
+ device pnp 4e.8 off end # GPIO 2
+ device pnp 4e.9 off end # GPIO 3, GPIO 4
+ device pnp 4e.a off end # ACPI
+ device pnp 4e.b on # Hardware monitor
+ io 0x60 = 0x290
+ irq 0x70 = 5
+ end
+ end
+ end
+ device pci 1.1 on end # SMbus
+ device pci 2.0 on end # USB 1.1
+ device pci 2.1 on end # USB 2
+ device pci 4.0 on end # Onboard audio (ACI)
+ device pci 4.1 off end # Onboard modem (MCI), N/A
+ device pci 6.0 on end # IDE
+ device pci 7.0 on end # SATA 1
+ device pci 8.0 on end # SATA 0
+ device pci 9.0 on end # PCI
+ device pci a.0 on end # NIC
+ device pci b.0 off end # PCI E 3 (N/A)
+ device pci c.0 off end # PCI E 2 (N/A)
+ device pci d.0 on end # PCI E 1
+ device pci e.0 on end # PCI E 0
+ register "ide0_enable" = "1"
+ register "ide1_enable" = "1"
+ register "sata0_enable" = "1"
+ register "sata1_enable" = "1"
+ end
+ end
+ device pci 18.1 on end
+ device pci 18.2 on end
+ device pci 18.3 on end
+ end
+ end
end