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authorUwe Hermann <uwe@hermann-uwe.de>2010-03-05 10:03:50 +0000
committerStefan Reinauer <stepan@openbios.org>2010-03-05 10:03:50 +0000
commit01ce601bdb4e664b502e8816a3e13e7b1d275e50 (patch)
treea79fb9dd4ab50ce103fb6d20177460c96445bdc9 /src/mainboard/msi
parent5fa76e2864fada5a87d210a0b994a55f8a235024 (diff)
downloadcoreboot-01ce601bdb4e664b502e8816a3e13e7b1d275e50.tar.xz
This patch is from 2009-10-20
Convert all DEBUG_SMBUS, DEBUG_SMI, and DEBUG_RAM_SETUP custom and local #defines into globally configurable kconfig options (and Options.lb options for as long as newconfig still exists) which can be enabled by the user in the "Debugging" menu. The respective menu items only appear if a board is selected where the chipset code actually provides such additional DEBUG output. All three variables default to 0 / off for now. Also, drop a small chunk of dead/useless code in the src/northbridge/via/cn700/raminit.c file, which would otherwise break compilation. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Reworked to still apply to trunk, added X86EMU_DEBUG (and make the x86emu/yabel code only work printf instead of a redefined version of printk and Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5185 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/msi')
-rw-r--r--src/mainboard/msi/ms7135/romstage.c3
-rw-r--r--src/mainboard/msi/ms7260/romstage.c1
-rw-r--r--src/mainboard/msi/ms9185/romstage.c2
-rw-r--r--src/mainboard/msi/ms9282/romstage.c2
4 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c
index 6616dc1444..9477c6e514 100644
--- a/src/mainboard/msi/ms7135/romstage.c
+++ b/src/mainboard/msi/ms7135/romstage.c
@@ -30,9 +30,6 @@
/* Used by raminit. */
#define QRANK_DIMM_SUPPORT 1
-/* Turn this on for SMBus debugging output. */
-#define DEBUG_SMBUS 0
-
#if CONFIG_LOGICAL_CPUS == 1
#define SET_NB_CFG_54 1
#endif
diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c
index 7a8bf13a79..a8697b5114 100644
--- a/src/mainboard/msi/ms7260/romstage.c
+++ b/src/mainboard/msi/ms7260/romstage.c
@@ -24,7 +24,6 @@
#define __PRE_RAM__
// #define CACHE_AS_RAM_ADDRESS_DEBUG 1
-// #define DEBUG_SMBUS 1
// #define RAM_TIMING_DEBUG 1
// #define DQS_TRAIN_DEBUG 1
// #define RES_DEBUG 1
diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c
index 255815707a..4903b3edd7 100644
--- a/src/mainboard/msi/ms9185/romstage.c
+++ b/src/mainboard/msi/ms9185/romstage.c
@@ -42,8 +42,6 @@
//if we want to wait for core1 done before DQS training, set it to 0
#define K8_SET_FIDVID_CORE0_ONLY 1
-#define DEBUG_SMBUS 1
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c
index 11c92b81fa..b552788a54 100644
--- a/src/mainboard/msi/ms9282/romstage.c
+++ b/src/mainboard/msi/ms9282/romstage.c
@@ -38,8 +38,6 @@
//if we want to wait for core1 done before DQS training, set it to 0
#define K8_SET_FIDVID_CORE0_ONLY 1
-#define DEBUG_SMBUS 1
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>