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authorArthur Heymans <arthur@aheymans.xyz>2017-04-19 13:19:15 +0200
committerMartin Roth <martinroth@google.com>2017-04-28 17:19:37 +0200
commit8621a135d40c93445684f7b1e9c77d9aee392978 (patch)
tree0836e7736671506fa07e161774bd2a9d7cc85389 /src/mainboard/msi
parent3eff00ec76f91f5dc9ddf39e2e6073f6053c94a1 (diff)
downloadcoreboot-8621a135d40c93445684f7b1e9c77d9aee392978.tar.xz
sb/nvidia/mcp55: Link early_ctrl.c
Change-Id: I3a55c2e8077fdb10768df287f38efcd5e2e64bdf Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19365 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/msi')
-rw-r--r--src/mainboard/msi/ms7260/romstage.c1
-rw-r--r--src/mainboard/msi/ms9282/romstage.c1
-rw-r--r--src/mainboard/msi/ms9652_fam10/romstage.c1
3 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c
index e961e0df6a..1ae6c64696 100644
--- a/src/mainboard/msi/ms7260/romstage.c
+++ b/src/mainboard/msi/ms7260/romstage.c
@@ -61,7 +61,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address);
}
-#include "southbridge/nvidia/mcp55/early_ctrl.c"
#include <northbridge/amd/amdk8/f.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c
index fbc362bcf4..b4977303c1 100644
--- a/src/mainboard/msi/ms9282/romstage.c
+++ b/src/mainboard/msi/ms9282/romstage.c
@@ -70,7 +70,6 @@ int spd_read_byte(unsigned device, unsigned address)
return smbus_read_byte(device, address);
}
-#include "southbridge/nvidia/mcp55/early_ctrl.c"
#include <northbridge/amd/amdk8/f.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index 2f191ee5bb..4acb240548 100644
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -42,7 +42,6 @@
#include <arch/early_variables.h>
#include <cbmem.h>
#include <southbridge/nvidia/mcp55/mcp55.h>
-#include "southbridge/nvidia/mcp55/early_ctrl.c"
#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"