diff options
| author | Myles Watson <mylesgw@gmail.com> | 2009-11-06 23:42:26 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2009-11-06 23:42:26 +0000 |
| commit | d27c08c2898d1d74765a7799628d1c18369fd671 (patch) | |
| tree | 7ac357d2b44d833c6efe70d1e691c6611c521e8d /src/mainboard/msi | |
| parent | 547d48ab01049a634dccb16d1847524d5ba93e33 (diff) | |
| download | coreboot-d27c08c2898d1d74765a7799628d1c18369fd671.tar.xz | |
Remove drivers/pci/onboard. The only purpose was for option ROMs, which are
now handled more generically using CBFS.
Simplify the option ROM code in device/pci_rom.c, since there are only two ways
to get a ROM address now (CBFS and the device) and add an exception for qemu.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/msi')
| -rw-r--r-- | src/mainboard/msi/ms6178/Config.lb | 4 | ||||
| -rw-r--r-- | src/mainboard/msi/ms6178/devicetree.cb | 4 | ||||
| -rw-r--r-- | src/mainboard/msi/ms9185/Config.lb | 23 | ||||
| -rw-r--r-- | src/mainboard/msi/ms9185/devicetree.cb | 23 | ||||
| -rw-r--r-- | src/mainboard/msi/ms9282/Config.lb | 14 | ||||
| -rw-r--r-- | src/mainboard/msi/ms9282/devicetree.cb | 14 |
6 files changed, 12 insertions, 70 deletions
diff --git a/src/mainboard/msi/ms6178/Config.lb b/src/mainboard/msi/ms6178/Config.lb index 5c6f9c06bc..3f77f30555 100644 --- a/src/mainboard/msi/ms6178/Config.lb +++ b/src/mainboard/msi/ms6178/Config.lb @@ -75,9 +75,7 @@ chip northbridge/intel/i82810 # Northbridge end device pci_domain 0 on device pci 0.0 on end # Host bridge - chip drivers/pci/onboard # Onboard VGA - device pci 1.0 on end - end + device pci 1.0 on end # Onboard VGA chip southbridge/intel/i82801xx # Southbridge register "ide0_enable" = "1" register "ide1_enable" = "1" diff --git a/src/mainboard/msi/ms6178/devicetree.cb b/src/mainboard/msi/ms6178/devicetree.cb index 1676ab5a9a..baa0e040b8 100644 --- a/src/mainboard/msi/ms6178/devicetree.cb +++ b/src/mainboard/msi/ms6178/devicetree.cb @@ -26,9 +26,7 @@ chip northbridge/intel/i82810 # Northbridge end device pci_domain 0 on device pci 0.0 on end # Host bridge - chip drivers/pci/onboard # Onboard VGA - device pci 1.0 on end - end + device pci 1.0 on end # Onboard VGA chip southbridge/intel/i82801xx # Southbridge register "ide0_enable" = "1" register "ide1_enable" = "1" diff --git a/src/mainboard/msi/ms9185/Config.lb b/src/mainboard/msi/ms9185/Config.lb index 0af1b60c4c..c3bddcfe1f 100644 --- a/src/mainboard/msi/ms9185/Config.lb +++ b/src/mainboard/msi/ms9185/Config.lb @@ -207,29 +207,8 @@ chip northbridge/amd/amdk8/root_complex device pci 2.0 on end # USB 0x0223 device pci 2.1 on end # USB device pci 2.2 on end # USB - #when CONFIG_HT_CHAIN_END_UNITID_BASE (0,1) < CONFIG_HT_CHAIN_UNITID_BASE (6,,,,), - chip drivers/pci/onboard - device pci 3.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address - # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 4, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 3 - end - #bx_a013+ start - #chip drivers/pci/onboard #SATA2 - # device pci 5.0 on end - # device pci 5.1 on end - # device pci 5.2 on end - # device pci 5.3 on end - #end - #bx_a013+ end - + device pci 3.0 on end # it is in bcm5785_0 bus end - #when CONFIG_HT_CHAIN_END_UNITID_BASE > CONFIG_HT_CHAIN_UNITID_BASE (6, ,,,,) -# chip drivers/pci/onboard -# device pci 0.0 on end # fake, will be disabled -# end -# chip drivers/pci/onboard -# device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed -# end - end # device pci 18.0 device pci 18.1 on end device pci 18.2 on end diff --git a/src/mainboard/msi/ms9185/devicetree.cb b/src/mainboard/msi/ms9185/devicetree.cb index 3f02199d69..720075ba2a 100644 --- a/src/mainboard/msi/ms9185/devicetree.cb +++ b/src/mainboard/msi/ms9185/devicetree.cb @@ -73,29 +73,8 @@ chip northbridge/amd/amdk8/root_complex device pci 2.0 on end # USB 0x0223 device pci 2.1 on end # USB device pci 2.2 on end # USB - #when CONFIG_HT_CHAIN_END_UNITID_BASE (0,1) < CONFIG_HT_CHAIN_UNITID_BASE (6,,,,), - chip drivers/pci/onboard - device pci 3.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address - # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 4, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 3 - end - #bx_a013+ start - #chip drivers/pci/onboard #SATA2 - # device pci 5.0 on end - # device pci 5.1 on end - # device pci 5.2 on end - # device pci 5.3 on end - #end - #bx_a013+ end - + device pci 3.0 on end # it is in bcm5785_0 bus end - #when CONFIG_HT_CHAIN_END_UNITID_BASE > CONFIG_HT_CHAIN_UNITID_BASE (6, ,,,,) -# chip drivers/pci/onboard -# device pci 0.0 on end # fake, will be disabled -# end -# chip drivers/pci/onboard -# device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed -# end - end # device pci 18.0 device pci 18.1 on end device pci 18.2 on end diff --git a/src/mainboard/msi/ms9282/Config.lb b/src/mainboard/msi/ms9282/Config.lb index c0c4ed10e6..8faf6117f4 100644 --- a/src/mainboard/msi/ms9282/Config.lb +++ b/src/mainboard/msi/ms9282/Config.lb @@ -278,27 +278,21 @@ chip northbridge/amd/amdk8/root_complex device pci 5.1 on end # SATA 1 device pci 5.2 on end # SATA 2 device pci 6.0 on #P2P - chip drivers/pci/onboard - device pci 4.0 on end - end + device pci 4.0 on end end # P2P device pci 7.0 on end # reserve device pci 8.0 on end # MAC0 device pci 9.0 on end # MAC1 device pci a.0 on device pci 0.0 on - chip drivers/pci/onboard - device pci 4.0 on end #pci_E lan1 - device pci 4.1 on end #pci_E lan2 - end + device pci 4.0 on end #pci_E lan1 + device pci 4.1 on end #pci_E lan2 end end # 0x376 device pci b.0 on end # PCI E 0x374 device pci c.0 on end device pci d.0 on #SAS - chip drivers/pci/onboard - device pci 0.0 on end - end + device pci 0.0 on end end # PCI E 1 0x378 device pci e.0 on end # PCI E 0 0x375 device pci f.0 on end #PCI E 0x377 pci_E slot diff --git a/src/mainboard/msi/ms9282/devicetree.cb b/src/mainboard/msi/ms9282/devicetree.cb index bf334408e8..0287f13bf3 100644 --- a/src/mainboard/msi/ms9282/devicetree.cb +++ b/src/mainboard/msi/ms9282/devicetree.cb @@ -137,27 +137,21 @@ chip northbridge/amd/amdk8/root_complex device pci 5.1 on end # SATA 1 device pci 5.2 on end # SATA 2 device pci 6.0 on #P2P - chip drivers/pci/onboard - device pci 4.0 on end - end + device pci 4.0 on end end # P2P device pci 7.0 on end # reserve device pci 8.0 on end # MAC0 device pci 9.0 on end # MAC1 device pci a.0 on device pci 0.0 on - chip drivers/pci/onboard - device pci 4.0 on end #pci_E lan1 - device pci 4.1 on end #pci_E lan2 - end + device pci 4.0 on end #pci_E lan1 + device pci 4.1 on end #pci_E lan2 end end # 0x376 device pci b.0 on end # PCI E 0x374 device pci c.0 on end device pci d.0 on #SAS - chip drivers/pci/onboard - device pci 0.0 on end - end + device pci 0.0 on end end # PCI E 1 0x378 device pci e.0 on end # PCI E 0 0x375 device pci f.0 on end #PCI E 0x377 pci_E slot |