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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-25 09:03:55 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-25 09:03:55 +0000 |
| commit | df323fcefd6020f8f418a13d65a075d282eed3de (patch) | |
| tree | 1a7180ff77784fca47bb25785aad7a8b7db9dadb /src/mainboard/msi | |
| parent | 48ae6086da64eb260c6eed676c593cdcd0957fbf (diff) | |
| download | coreboot-df323fcefd6020f8f418a13d65a075d282eed3de.tar.xz | |
MCP55: Add TINY_BOOTBLOCK support.
Also, move CONFIG_HT_CHAIN_END_UNITID_BASE #ifdef block to mcp55.h to make
the build work (but this is a good idea anyway, as it's used in
multiple files).
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6123 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/msi')
| -rw-r--r-- | src/mainboard/msi/ms7260/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/msi/ms9282/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/msi/ms9652_fam10/romstage.c | 2 |
3 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index a3ea7d7f9f..4ec8cec9f2 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -83,7 +83,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address) #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" -#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c" #include "northbridge/amd/amdk8/early_ht.c" static void sio_setup(void) @@ -125,7 +124,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Allow the HT devices to be found. */ enumerate_ht_chain(); sio_setup(); - mcp55_enable_rom(); } if (bist == 0) diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c index 5036f17707..f5e9f265f3 100644 --- a/src/mainboard/msi/ms9282/romstage.c +++ b/src/mainboard/msi/ms9282/romstage.c @@ -96,7 +96,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/model_fxx/init_cpus.c" // Disabled until it's actually used: // #include "cpu/amd/model_fxx/fidvid.c" -#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c" #include "northbridge/amd/amdk8/early_ht.c" static void sio_setup(void) @@ -138,7 +137,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Allow the HT devices to be found */ enumerate_ht_chain(); sio_setup(); - mcp55_enable_rom(); } if (bist == 0) { diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c index 49b3e177c3..5c0c9ae31a 100644 --- a/src/mainboard/msi/ms9652_fam10/romstage.c +++ b/src/mainboard/msi/ms9652_fam10/romstage.c @@ -78,7 +78,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/microcode/microcode.c" #include "cpu/amd/model_10xxx/update_microcode.c" #include "cpu/amd/model_10xxx/init_cpus.c" -#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c" #include "northbridge/amd/amdfam10/early_ht.c" static void sio_setup(void) @@ -117,7 +116,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) set_bsp_node_CHtExtNodeCfgEn(); enumerate_ht_chain(); sio_setup(); - mcp55_enable_rom(); } post_code(0x30); |