sconfig: rename pci_domain -> domain

The name pci_domain was a bit misleading, since the construct is only
PCI specific in a particular (northbridge/cpu) implementation, but not
by concept. As implementations and hardware change, be more generic
about our naming. This will allow us to support non-PCI systems without
adding new keywords.

Change-Id: Ide885a1d5e15d37560c79b936a39252150560e85
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2376
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

9 files changed, 10 insertions, 10 deletions

diff --git a/src/mainboard/msi/ms6119/devicetree.cb b/src/mainboard/msi/ms6119/devicetree.cb
index d5be59fe63..6829a3ab2c 100644
--- a/src/mainboard/msi/ms6119/devicetree.cb
+++ b/src/mainboard/msi/ms6119/devicetree.cb
@@ -4,7 +4,7 @@ chip northbridge/intel/i440bx		# Northbridge
       device lapic 0 on end		# APIC
     end
   end
-  device pci_domain 0 on		# PCI domain
+  device domain 0 on		# PCI domain
     device pci 0.0 on end		# Host bridge
     device pci 1.0 on end		# PCI/AGP bridge
     chip southbridge/intel/i82371eb	# Southbridge
diff --git a/src/mainboard/msi/ms6147/devicetree.cb b/src/mainboard/msi/ms6147/devicetree.cb
index 0500a7f935..3792e212cf 100644
--- a/src/mainboard/msi/ms6147/devicetree.cb
+++ b/src/mainboard/msi/ms6147/devicetree.cb
@@ -4,7 +4,7 @@ chip northbridge/intel/i440bx		# Northbridge
       device lapic 0 on end		# APIC
     end
   end
-  device pci_domain 0 on		# PCI domain
+  device domain 0 on		# PCI domain
     device pci 0.0 on end		# Host bridge
     device pci 1.0 on end		# PCI/AGP bridge
     chip southbridge/intel/i82371eb	# Southbridge
diff --git a/src/mainboard/msi/ms6156/devicetree.cb b/src/mainboard/msi/ms6156/devicetree.cb
index da3ba6f140..e038513b8a 100644
--- a/src/mainboard/msi/ms6156/devicetree.cb
+++ b/src/mainboard/msi/ms6156/devicetree.cb
@@ -24,7 +24,7 @@ chip northbridge/intel/i440bx		# Northbridge
       device lapic 0 on end		# APIC
     end
   end
-  device pci_domain 0 on		# PCI domain
+  device domain 0 on		# PCI domain
     device pci 0.0 on end		# Host bridge
     device pci 1.0 on end		# PCI/AGP bridge
     chip southbridge/intel/i82371eb	# Southbridge
diff --git a/src/mainboard/msi/ms6178/devicetree.cb b/src/mainboard/msi/ms6178/devicetree.cb
index 569aee52d7..c91ea0a306 100644
--- a/src/mainboard/msi/ms6178/devicetree.cb
+++ b/src/mainboard/msi/ms6178/devicetree.cb
@@ -24,7 +24,7 @@ chip northbridge/intel/i82810			# Northbridge
       device lapic 0 on end			# APIC
     end
   end
-  device pci_domain 0 on
+  device domain 0 on
     device pci 0.0 on end			# Host bridge
     device pci 1.0 on end			# Onboard VGA
     chip southbridge/intel/i82801ax		# Southbridge
diff --git a/src/mainboard/msi/ms7135/devicetree.cb b/src/mainboard/msi/ms7135/devicetree.cb
index 54e5d5e599..9546acda40 100644
--- a/src/mainboard/msi/ms7135/devicetree.cb
+++ b/src/mainboard/msi/ms7135/devicetree.cb
@@ -5,7 +5,7 @@ chip northbridge/amd/amdk8/root_complex		# Root complex
     end
   end
 
-  device pci_domain 0 on			# PCI domain
+  device domain 0 on			# PCI domain
     subsystemid 0x1462 0x7135 inherit
     chip northbridge/amd/amdk8			# Northbridge / RAM controller
       device pci 18.0 on			# Link 0 == LDT 0
diff --git a/src/mainboard/msi/ms7260/devicetree.cb b/src/mainboard/msi/ms7260/devicetree.cb
index 47d5381b5c..fe320ecd79 100644
--- a/src/mainboard/msi/ms7260/devicetree.cb
+++ b/src/mainboard/msi/ms7260/devicetree.cb
@@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex		# Root complex
       device lapic 0 on end			# Local APIC of the CPU
     end
   end
-  device pci_domain 0 on			# PCI domain
+  device domain 0 on			# PCI domain
     subsystemid 0x1462 0x7260 inherit
     chip northbridge/amd/amdk8			# Northbridge / RAM controller
       device pci 18.0 on			# Link 0 == LDT 0
diff --git a/src/mainboard/msi/ms9185/devicetree.cb b/src/mainboard/msi/ms9185/devicetree.cb
index 9576225e91..b41a1624cd 100644
--- a/src/mainboard/msi/ms9185/devicetree.cb
+++ b/src/mainboard/msi/ms9185/devicetree.cb
@@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex
                         device lapic 0 on end
                 end
         end
-       device pci_domain 0 on
+       device domain 0 on
                subsystemid 0x1022 0x2b80 inherit
                chip northbridge/amd/amdk8
                        device pci 18.0 on end
@@ -81,7 +81,7 @@ chip northbridge/amd/amdk8/root_complex
                        device pci 18.2 on end
                        device pci 18.3 on end
                end # amdk8
-       end #pci_domain
+       end #domain
 #        chip drivers/generic/debug
 #              device pnp 0.0 off end # chip name
 #                device pnp 0.1 on end # pci_regs_all
diff --git a/src/mainboard/msi/ms9282/devicetree.cb b/src/mainboard/msi/ms9282/devicetree.cb
index b52e7ed650..8b46deb74f 100644
--- a/src/mainboard/msi/ms9282/devicetree.cb
+++ b/src/mainboard/msi/ms9282/devicetree.cb
@@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex		# Root complex
       device lapic 0 on end			# Local APIC of the CPU
     end
   end
-  device pci_domain 0 on			# PCI domain
+  device domain 0 on			# PCI domain
     subsystemid 0x1462 0x9282 inherit
     chip northbridge/amd/amdk8			# Northbridge / RAM controller
       device pci 18.0 on			# Link 0 == LDT 0
diff --git a/src/mainboard/msi/ms9652_fam10/devicetree.cb b/src/mainboard/msi/ms9652_fam10/devicetree.cb
index 0e9a3ffe3e..4060ae50dd 100644
--- a/src/mainboard/msi/ms9652_fam10/devicetree.cb
+++ b/src/mainboard/msi/ms9652_fam10/devicetree.cb
@@ -27,7 +27,7 @@ chip northbridge/amd/amdfam10/root_complex	# Root complex
       device lapic 0 on end			# Local APIC of the CPU
     end
   end
-  device pci_domain 0 on			# PCI domain
+  device domain 0 on			# PCI domain
     subsystemid 0x1462 0x9652 inherit
     chip northbridge/amd/amdfam10		# Northbridge / RAM controller
       device pci 18.0 on			# Link 0