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author | Uwe Hermann <uwe@hermann-uwe.de> | 2008-11-20 23:18:10 +0000 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2008-11-20 23:18:10 +0000 |
commit | 4cf5ecf39d58751cbddbbeb3133886acaecc9550 (patch) | |
tree | 2216cf6194d51cfa3d0be66f4bc35951c8ea1e57 /src/mainboard/msi | |
parent | 76c6c95c1ee3d231ee861afba8dbc341f4c02e07 (diff) | |
download | coreboot-4cf5ecf39d58751cbddbbeb3133886acaecc9550.tar.xz |
Get rid of the unnecessary indirection by 'struct mem_controller' for the
Intel 810 chipset (and all boards using it). This isn't required for this
chipset as there's only one memory controller.
This also helps a lot with romcc register usage, you should see the dreaded
"too few registers" less often.
Build-tested with all three boards using the Intel 810 chipset.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3764 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/msi')
-rw-r--r-- | src/mainboard/msi/ms6178/auto.c | 15 |
1 files changed, 5 insertions, 10 deletions
diff --git a/src/mainboard/msi/ms6178/auto.c b/src/mainboard/msi/ms6178/auto.c index d92aa6b53b..a59074d17a 100644 --- a/src/mainboard/msi/ms6178/auto.c +++ b/src/mainboard/msi/ms6178/auto.c @@ -37,19 +37,11 @@ #include "southbridge/intel/i82801xx/i82801xx_early_smbus.c" #include "pc80/udelay_io.c" #include "northbridge/intel/i82810/raminit.c" -#include "sdram/generic_sdram.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) static void main(unsigned long bist) { - static const struct mem_controller memctrl[] = { - { - .d0 = PCI_DEV(0, 0, 0), - .channel0 = {0x50, 0x51}, - } - }; - if (bist == 0) early_mtrr_init(); @@ -66,7 +58,10 @@ static void main(unsigned long bist) enable_smbus(); report_bist_failure(bist); - /* dump_spd_registers(&memctrl[0]); */ - sdram_initialize(ARRAY_SIZE(memctrl), memctrl); + + /* dump_spd_registers(); */ + sdram_set_registers(); + sdram_set_spd_registers(); + sdram_enable(); /* ram_check(0, 640 * 1024); */ } |